From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: zhichao.gao@intel.com) Received: from mga03.intel.com (mga03.intel.com []) by groups.io with SMTP; Thu, 23 May 2019 22:04:51 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 May 2019 22:04:50 -0700 X-ExtLoop1: 1 Received: from fieedk001.ccr.corp.intel.com ([10.239.33.119]) by fmsmga001.fm.intel.com with ESMTP; 23 May 2019 22:04:48 -0700 From: "Gao, Zhichao" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek , Liming Gao , Sean Brogan , Michael Turner , Bret Barkelew Subject: [PATCH 5/6] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol Date: Fri, 24 May 2019 13:04:36 +0800 Message-Id: <20190524050437.38616-6-zhichao.gao@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190524050437.38616-1-zhichao.gao@intel.com> References: <20190524050437.38616-1-zhichao.gao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1400 Implement Cp2 protocol: it has one interface to enable the interrupt and put cpu to sleep and wait for an interrupt. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Liming Gao Cc: Sean Brogan Cc: Michael Turner Cc: Bret Barkelew Signed-off-by: Zhichao Gao --- UefiCpuPkg/CpuDxe/CpuDxe.c | 40 +++++++++++++++++++++++++++++++++++- UefiCpuPkg/CpuDxe/CpuDxe.h | 15 ++++++++++++++ UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 ++- 3 files changed, 56 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 7d7270e10b..0d0cdf6f86 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -1,7 +1,7 @@ /** @file CPU DXE Module to produce CPU ARCH Protocol. - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -18,6 +18,7 @@ // BOOLEAN InterruptState = FALSE; EFI_HANDLE mCpuHandle = NULL; +EFI_HANDLE mCpu2Handle = NULL; BOOLEAN mIsFlushingGCD; BOOLEAN mIsAllocatingPageTable = FALSE; UINT64 mValidMtrrAddressMask; @@ -96,6 +97,10 @@ EFI_CPU_ARCH_PROTOCOL gCpu = { 4 // DmaBufferAlignment }; +EFI_CPU2_PROTOCOL gCpu2 = { + CpuEnableAndWaitForInterrupt +}; + // // CPU Arch Protocol Functions // @@ -499,6 +504,28 @@ CpuSetMemoryAttributes ( return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttributes, NULL); } +// +// CPU2 Protocol Functions +// +/** + This function enables CPU interrupts and then waits for an interrupt to arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EFI_CPU2_PROTOCOL *This + ) +{ + EnableInterruptsAndSleep (); + + return EFI_SUCCESS; +} + /** Initializes the valid bits mask and valid address mask for MTRRs. @@ -1211,6 +1238,17 @@ InitializeCpu ( ); ASSERT_EFI_ERROR (Status); + // + // Install CPU2 Protocol + // + Status = gBS->InstallMultipleProtocolInterfaces ( + &mCpu2Handle, + &gEfiCpu2ProtocolGuid, + &gCpu2, + NULL + ); + ASSERT_EFI_ERROR (Status); + InitializeMpSupport (); return Status; diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h index b029be430b..8698ff78eb 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.h +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h @@ -12,6 +12,7 @@ #include #include +#include #include #include @@ -305,6 +306,20 @@ PageFaultExceptionHandler ( IN EFI_SYSTEM_CONTEXT SystemContext ); +/** + This function enables CPU interrupts and then waits for an interrupt to arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EFI_CPU2_PROTOCOL *This + ); + extern BOOLEAN mIsAllocatingPageTable; extern UINTN mNumberOfProcessors; diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 57381dbc85..d4ff562d89 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf @@ -1,7 +1,7 @@ ## @file # CPU driver installs CPU Architecture Protocol and CPU MP protocol. # -# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -62,6 +62,7 @@ gEfiCpuArchProtocolGuid ## PRODUCES gEfiMpServiceProtocolGuid ## PRODUCES gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES + gEfiCpu2ProtocolGuid ## PRODUCES [Guids] gIdleLoopEventGuid ## CONSUMES ## Event -- 2.21.0.windows.1