From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=GWQjzVQI; spf=pass (domain: linaro.org, ip: 209.85.221.68, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by groups.io with SMTP; Fri, 24 May 2019 08:11:58 -0700 Received: by mail-wr1-f68.google.com with SMTP id l17so1994573wrm.10 for ; Fri, 24 May 2019 08:11:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cheaASiO8lc9jl4EKFLyfVCSpyNpMikVwR817qp6RJ4=; b=GWQjzVQIHnPaCHRuZ5Gs6h8bwSDwNa98Pz7+SUTzbcJw8kIHWzbDNr9xLIJ9G29D9g cbY8BYCs/1O0pt50cgmznVmP4p5Yg37h2CJVfdrZ1O+qkg9IRcBPNZVrpUonEvBrOeDA xMXebsH8uOozquu2TUW5ADnwMUN/iZa0qxljG6q08l8K4ZuQzUCQReFUHTFgYCr69PT8 RaNCUApFl9BmoszDuSACEaO6yzrZCMaU0Z1evLO9zVj0phx8J1YpwruPSC8CsrdbEA/s CJCNZL8EsIr65BFzEMCyiOj8EgrmaPo/EpEZo9/ytDZx608oItXS6cXCcsM1PP2eKv0n WL+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cheaASiO8lc9jl4EKFLyfVCSpyNpMikVwR817qp6RJ4=; b=D0XuwInIQNV2JNGtsE8OaXTWSAO9N69a1PGYwfNqu7Phrb3mTQAzAlVuVSsf0Iq3dW YVDLjDGlMnfQVY+7xyEk8fJiKPQ57Pt3LjTRwGSMLY1YBAy+72Ynm9oN24C/KiDk5isg h1MzOMD67rgMGXFTxwqQRdgx4vWJzxr9Za/vJwH0V/jwQtxHZpNbvDUvgZF2Kxy7gBLJ PldVcJiWcBz/UwFclPloIcNk9kry/emOVpUmre/wWvheqf3vnxuoEiNc8z290kbc8CnR kdERbKJlTB8d8N2uYl1ZGqXmXpXzRm10eVanjwSk7XN+B0BxlD6mjHSRLs6F65vg0EYH 8obg== X-Gm-Message-State: APjAAAXzqNdRAIV0ym9y2Oz64FzQW6BoQLts6uG/xtm4eK02mGZYUds9 be2B84RgYIG+9910ot95m/G30u9rw1mG/bYs X-Google-Smtp-Source: APXvYqxJuqJJKpNYA/INrgVpdd/5eUHS/JnqJkNWfH9yHqIZYpAuUqf3ncETdZLdOLpE38Z7qX+gIQ== X-Received: by 2002:a5d:4411:: with SMTP id z17mr19267535wrq.168.1558710716012; Fri, 24 May 2019 08:11:56 -0700 (PDT) Return-Path: Received: from sudo.home ([2a01:cb1d:112:6f00:2042:d8f2:ded8:fa95]) by smtp.gmail.com with ESMTPSA id s62sm5147163wmf.24.2019.05.24.08.11.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 May 2019 08:11:54 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Laszlo Ersek , "Gao, Liming" , "Wang, Jian J" , Leif Lindholm , Michael D Kinney Subject: [PATCH 2/3] ArmPkg/ArmSoftFloatLib: switch to new version of softfloat library Date: Fri, 24 May 2019 17:11:39 +0200 Message-Id: <20190524151140.23539-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190524151140.23539-1-ard.biesheuvel@linaro.org> References: <20190524151140.23539-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Update the INF description and the top level .c files in order to switch to the new version of the SoftFloat library imported in the previous patch. Note that we no longer use the code that travelled a long way from the 2002 version of the softfloat library via NetBsd and the StdLib package. Instead, we are using the upstream version unmodified, with the glue .c file adopted from the OP-TEE project. This approach is much cleaner and much more maintainable. Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c | 295 ++++++++++++++++++++ ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf | 79 ++++-- 2 files changed, 355 insertions(+), 19 deletions(-) diff --git a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c new file mode 100644 index 000000000000..160e1ebab846 --- /dev/null +++ b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c @@ -0,0 +1,295 @@ +/* + * Copyright (c) 2015 - 2019, Linaro Limited + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + */ + +#include "platform.h" +#include + +/* + * On ARM32 EABI defines both a soft-float ABI and a hard-float ABI, + * hard-float is basically a super set of soft-float. Hard-float requires + * all the support routines provided for soft-float, but the compiler may + * choose to optimize to not use some of them. + * + * The AEABI functions uses soft-float calling convention even if the + * functions are compiled for hard-float. So where float and double would + * have been expected we use aeabi_float_t and aeabi_double_t respectively + * instead. + */ +typedef unsigned aeabi_float_t; +typedef unsigned long long aeabi_double_t; + +/* + * Helpers to convert between float32 and aeabi_float_t, and float64 and + * aeabi_double_t used by the AEABI functions below. + */ +static aeabi_float_t f32_to_f(float32_t val) +{ + union { + float32_t from; + aeabi_float_t to; + } res = { .from = val }; + + return res.to; +} + +static float32_t f32_from_f(aeabi_float_t val) +{ + union { + aeabi_float_t from; + float32_t to; + } res = { .from = val }; + + return res.to; +} + +static aeabi_double_t f64_to_d(float64_t val) +{ + union { + float64_t from; + aeabi_double_t to; + } res = { .from = val }; + + return res.to; +} + +static float64_t f64_from_d(aeabi_double_t val) +{ + union { + aeabi_double_t from; + float64_t to; + } res = { .from = val }; + + return res.to; +} + +/* + * From ARM Run-time ABI for ARM Architecture + * ARM IHI 0043D, current through ABI release 2.09 + * + * 4.1.2 The floating-point helper functions + */ + +/* + * Table 2, Standard aeabi_double_t precision floating-point arithmetic helper + * functions + */ + +aeabi_double_t __aeabi_dadd(aeabi_double_t a, aeabi_double_t b) +{ + return f64_to_d(f64_add(f64_from_d(a), f64_from_d(b))); +} + +aeabi_double_t __aeabi_ddiv(aeabi_double_t a, aeabi_double_t b) +{ + return f64_to_d(f64_div(f64_from_d(a), f64_from_d(b))); +} + +aeabi_double_t __aeabi_dmul(aeabi_double_t a, aeabi_double_t b) +{ + return f64_to_d(f64_mul(f64_from_d(a), f64_from_d(b))); +} + + +aeabi_double_t __aeabi_drsub(aeabi_double_t a, aeabi_double_t b) +{ + return f64_to_d(f64_sub(f64_from_d(b), f64_from_d(a))); +} + +aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b) +{ + return f64_to_d(f64_sub(f64_from_d(a), f64_from_d(b))); +} + +/* + * Table 3, double precision floating-point comparison helper functions + */ + +int __aeabi_dcmpeq(aeabi_double_t a, aeabi_double_t b) +{ + return f64_eq(f64_from_d(a), f64_from_d(b)); +} + +int __aeabi_dcmplt(aeabi_double_t a, aeabi_double_t b) +{ + return f64_lt(f64_from_d(a), f64_from_d(b)); +} + +int __aeabi_dcmple(aeabi_double_t a, aeabi_double_t b) +{ + return f64_le(f64_from_d(a), f64_from_d(b)); +} + +int __aeabi_dcmpge(aeabi_double_t a, aeabi_double_t b) +{ + return f64_le(f64_from_d(b), f64_from_d(a)); +} + +int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b) +{ + return f64_lt(f64_from_d(b), f64_from_d(a)); +} + +/* + * Table 4, Standard single precision floating-point arithmetic helper + * functions + */ + +aeabi_float_t __aeabi_fadd(aeabi_float_t a, aeabi_float_t b) +{ + return f32_to_f(f32_add(f32_from_f(a), f32_from_f(b))); +} + +aeabi_float_t __aeabi_fdiv(aeabi_float_t a, aeabi_float_t b) +{ + return f32_to_f(f32_div(f32_from_f(a), f32_from_f(b))); +} + +aeabi_float_t __aeabi_fmul(aeabi_float_t a, aeabi_float_t b) +{ + return f32_to_f(f32_mul(f32_from_f(a), f32_from_f(b))); +} + +aeabi_float_t __aeabi_frsub(aeabi_float_t a, aeabi_float_t b) +{ + return f32_to_f(f32_sub(f32_from_f(b), f32_from_f(a))); +} + +aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b) +{ + return f32_to_f(f32_sub(f32_from_f(a), f32_from_f(b))); +} + +/* + * Table 5, Standard single precision floating-point comparison helper + * functions + */ + +int __aeabi_fcmpeq(aeabi_float_t a, aeabi_float_t b) +{ + return f32_eq(f32_from_f(a), f32_from_f(b)); +} + +int __aeabi_fcmplt(aeabi_float_t a, aeabi_float_t b) +{ + return f32_lt(f32_from_f(a), f32_from_f(b)); +} + +int __aeabi_fcmple(aeabi_float_t a, aeabi_float_t b) +{ + return f32_le(f32_from_f(a), f32_from_f(b)); +} + +int __aeabi_fcmpge(aeabi_float_t a, aeabi_float_t b) +{ + return f32_le(f32_from_f(b), f32_from_f(a)); +} + +int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b) +{ + return f32_lt(f32_from_f(b), f32_from_f(a)); +} + +/* + * Table 6, Standard floating-point to integer conversions + */ + +int __aeabi_d2iz(aeabi_double_t a) +{ + return f64_to_i32_r_minMag(f64_from_d(a), false); +} + +unsigned __aeabi_d2uiz(aeabi_double_t a) +{ + return f64_to_ui32_r_minMag(f64_from_d(a), false); +} + +long long __aeabi_d2lz(aeabi_double_t a) +{ + return f64_to_i64_r_minMag(f64_from_d(a), false); +} + +unsigned long long __aeabi_d2ulz(aeabi_double_t a) +{ + return f64_to_ui64_r_minMag(f64_from_d(a), false); +} + +int __aeabi_f2iz(aeabi_float_t a) +{ + return f32_to_i32_r_minMag(f32_from_f(a), false); +} + +unsigned __aeabi_f2uiz(aeabi_float_t a) +{ + return f32_to_ui32_r_minMag(f32_from_f(a), false); +} + +long long __aeabi_f2lz(aeabi_float_t a) +{ + return f32_to_i64_r_minMag(f32_from_f(a), false); +} + +unsigned long long __aeabi_f2ulz(aeabi_float_t a) +{ + return f32_to_ui64_r_minMag(f32_from_f(a), false); +} + +/* + * Table 7, Standard conversions between floating types + */ + +aeabi_float_t __aeabi_d2f(aeabi_double_t a) +{ + return f32_to_f(f64_to_f32(f64_from_d(a))); +} + +aeabi_double_t __aeabi_f2d(aeabi_float_t a) +{ + return f64_to_d(f32_to_f64(f32_from_f(a))); +} + +/* + * Table 8, Standard integer to floating-point conversions + */ + +aeabi_double_t __aeabi_i2d(int a) +{ + return f64_to_d(i32_to_f64(a)); +} + +aeabi_double_t __aeabi_ui2d(unsigned a) +{ + return f64_to_d(ui32_to_f64(a)); +} + +aeabi_double_t __aeabi_l2d(long long a) +{ + return f64_to_d(i64_to_f64(a)); +} + +aeabi_double_t __aeabi_ul2d(unsigned long long a) +{ + return f64_to_d(ui64_to_f64(a)); +} + +aeabi_float_t __aeabi_i2f(int a) +{ + return f32_to_f(i32_to_f32(a)); +} + +aeabi_float_t __aeabi_ui2f(unsigned a) +{ + return f32_to_f(ui32_to_f32(a)); +} + +aeabi_float_t __aeabi_l2f(long long a) +{ + return f32_to_f(i64_to_f32(a)); +} + +aeabi_float_t __aeabi_ul2f(unsigned long long a) +{ + return f32_to_f(ui64_to_f32(a)); +} diff --git a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf index cbb49f49ade6..7c909d332845 100644 --- a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf +++ b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf @@ -2,7 +2,7 @@ # ARM Software floating point Library. # # Copyright (c) 2014, ARM Ltd. All rights reserved. -# Copyright (c) 2015, Linaro Ltd. All rights reserved. +# Copyright (c) 2015 - 2019, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -10,7 +10,7 @@ ## [Defines] - INF_VERSION = 0x00010005 + INF_VERSION = 0x0001001B BASE_NAME = ArmSoftFloatLib FILE_GUID = a485f921-749e-41a0-9f91-62f09a38721c MODULE_TYPE = BASE @@ -22,26 +22,67 @@ # [Sources] - bits32/softfloat.c - Arm/__aeabi_dcmpeq.c - Arm/__aeabi_fcmpeq.c - Arm/__aeabi_dcmpge.c - Arm/__aeabi_fcmpge.c - Arm/__aeabi_dcmpgt.c - Arm/__aeabi_fcmpgt.c - Arm/__aeabi_dcmple.c - Arm/__aeabi_fcmple.c - Arm/__aeabi_dcmplt.c - Arm/__aeabi_fcmplt.c - Arm/__aeabi_dcmpun.c - Arm/__aeabi_fcmpun.c + SoftFloat-3e/source/f32_add.c + SoftFloat-3e/source/f32_div.c + SoftFloat-3e/source/f32_eq.c + SoftFloat-3e/source/f32_le.c + SoftFloat-3e/source/f32_lt.c + SoftFloat-3e/source/f32_mul.c + SoftFloat-3e/source/f32_sub.c + SoftFloat-3e/source/f32_to_f64.c + SoftFloat-3e/source/f32_to_i32_r_minMag.c + SoftFloat-3e/source/f32_to_i64_r_minMag.c + SoftFloat-3e/source/f32_to_ui32_r_minMag.c + SoftFloat-3e/source/f32_to_ui64_r_minMag.c + SoftFloat-3e/source/f64_add.c + SoftFloat-3e/source/f64_div.c + SoftFloat-3e/source/f64_eq.c + SoftFloat-3e/source/f64_le.c + SoftFloat-3e/source/f64_lt.c + SoftFloat-3e/source/f64_mul.c + SoftFloat-3e/source/f64_sub.c + SoftFloat-3e/source/f64_to_f32.c + SoftFloat-3e/source/f64_to_i32_r_minMag.c + SoftFloat-3e/source/f64_to_i64_r_minMag.c + SoftFloat-3e/source/f64_to_ui32_r_minMag.c + SoftFloat-3e/source/f64_to_ui64_r_minMag.c + SoftFloat-3e/source/i32_to_f32.c + SoftFloat-3e/source/i32_to_f64.c + SoftFloat-3e/source/i64_to_f32.c + SoftFloat-3e/source/i64_to_f64.c + SoftFloat-3e/source/ui32_to_f32.c + SoftFloat-3e/source/ui32_to_f64.c + SoftFloat-3e/source/ui64_to_f32.c + SoftFloat-3e/source/ui64_to_f64.c + SoftFloat-3e/source/s_subMagsF32.c + SoftFloat-3e/source/s_subMagsF64.c + SoftFloat-3e/source/s_addMagsF32.c + SoftFloat-3e/source/s_addMagsF64.c + SoftFloat-3e/source/s_normSubnormalF64Sig.c + SoftFloat-3e/source/s_normSubnormalF32Sig.c + SoftFloat-3e/source/s_roundPackToF32.c + SoftFloat-3e/source/s_roundPackToF64.c + SoftFloat-3e/source/s_shortShiftRightJam64.c + SoftFloat-3e/source/s_shiftRightJam32.c + SoftFloat-3e/source/s_normRoundPackToF32.c + SoftFloat-3e/source/s_normRoundPackToF64.c + SoftFloat-3e/source/s_shiftRightJam64.c + SoftFloat-3e/source/s_countLeadingZeros8.c + SoftFloat-3e/source/s_countLeadingZeros32.c + SoftFloat-3e/source/s_countLeadingZeros64.c + SoftFloat-3e/source/s_mul64To128.c + SoftFloat-3e/source/softfloat_state.c - Arm/__aeabi_cdcmp.asm | RVCT - Arm/__aeabi_cfcmp.asm | RVCT + SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/platform.h + SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF64UI.c + SoftFloat-3e/source/ARM-VFPv2/softfloat_raiseFlags.c + SoftFloat-3e/source/ARM-VFPv2/specialize.h + SoftFloat-3e/source/include/internals.h + + ArmSoftFloatLib.c [Packages] MdePkg/MdePkg.dec [BuildOptions] - GCC:*_*_*_CC_FLAGS = -DSOFTFLOAT_FOR_GCC -Wno-enum-compare -fno-lto - RVCT:*_*_*_CC_FLAGS = -DSOFTFLOAT_FOR_GCC + GCC:*_*_*_CC_FLAGS = -fno-lto -ffreestanding -Wno-unused-label -DSOFTFLOAT_FAST_INT64 -- 2.20.1