From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=br3GJp4X; spf=pass (domain: linaro.org, ip: 209.85.221.66, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Wed, 29 May 2019 05:50:28 -0700 Received: by mail-wr1-f66.google.com with SMTP id c2so1682606wrm.8 for ; Wed, 29 May 2019 05:50:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=LsKKroqQQv2nKRB1JWd/TEX6SC4Szbk4zCUg1BAVazI=; b=br3GJp4XTa3Nd9Im+iTzwmDVtVuB7ZvIv8LcC1ZG8NwsTPAo4HyRBYzfLmc6xEjMXz 22O/DZK5In9NVAO/a4PGwz2X6PhlRaYARr6GIGCS/Y/5J3wkzWtkGwBnebayzqTBwlr4 e0TUzfD4QAICyX7alzxx/7HAXcRJ45Wxxml/uMFOUDKyaYXHmG6XvgNnC1vhalyy05FC sLWzVU6AshAtFj891Vp4cVs3mcTFdXReZ52pcp+HHhlUKfOVxtv45M8YtZyh/LYeAN16 I2ELdj8d2B7638kmmmPTvSPkBzUfpzDrPu5ZyRw6+pQ4c8IYBp5dZE9UMW22QQdkw4cd 8aTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=LsKKroqQQv2nKRB1JWd/TEX6SC4Szbk4zCUg1BAVazI=; b=VBWQ3pjYK9mqx5EGAH/ZWodrMF2ZYHcqFdcc5fr+v32eZI3kng3OLgc7klChmi2HTK xBifnpJFHqqvOlgkJqM6lyNcuFnhk7JnK1rGy3T5xuLZaUrnBUF+aOKnnvMI43yMwZB3 tpJSvEdA6l118QPDTDMyftD1sa4NzL6jMq/oOyp2/PONizXEtvVPaCIY60MkSlQjAIsU arO3s4PHCqLyZW0Z9QjKW4j0UMtzYMOV5ycL70YSaK+XgAJZUtDfC2grrZ4k0LHl5WGG iFWzyX49aZMrOERwcZ0az3wGTeMqJ10njZTRcwIak2gfNmWpbMkTzGBNLcnghOaxyrRR j8YA== X-Gm-Message-State: APjAAAUH1B38N7BLZ8eEVmM9B5Ssb6XPwPEKXeO4lA3/V02GyrG1Pg0H Dp2KtHrwH9HABeooC+EBXQKBJ9Vp+Hj93g== X-Google-Smtp-Source: APXvYqweUDUq5EphFM2YDEdX925wIoOPZIIxlQ+MCInvDQIcP9y35HQFuVd3wyRWmNOZNhIaSJbQlw== X-Received: by 2002:adf:fe90:: with SMTP id l16mr1780484wrr.221.1559134225987; Wed, 29 May 2019 05:50:25 -0700 (PDT) Return-Path: Received: from sudo.home ([2a01:cb1d:112:6f00:c225:e9ff:fe2e:ea8]) by smtp.gmail.com with ESMTPSA id l18sm18112608wrv.38.2019.05.29.05.50.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 29 May 2019 05:50:25 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, masahisa.kojima@linaro.org, Ard Biesheuvel Subject: [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Date: Wed, 29 May 2019 14:50:16 +0200 Message-Id: <20190529125021.28308-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This is the first part of a set of changes to support the Secure96 TPM on SynQuacer. This part only concerns usage by the OS of the TPM, i.e., exposing the SPI controller and TPM peripherals correctly via DT and ACPI. Wiring up the TPM into UEFI requires more intrusive changes, and this is a work in progress. Note that patch #5 is only included for reference - it adds AML code to reset the TPM when the device is probed via ACPI. This is necessary since the firmware does not touch the TPM at all. Ard Biesheuvel (5): Silicon/SynQuacer: add missing SPI controller interrupt lines to DT Silicon/SynQuacer: add ACPI description of second SPI controller Platform/Secure96Dxe: redefine LS connector CS as platform property Platform/Secure96Dxe: add TPM description to SSDT DO NOT MERGE - temporary hack to reset the TPM at probe time Platform/96Boards/Secure96Dxe/Secure96.asl | 12 ++++++ Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +- Platform/96Boards/Secure96Dxe/Secure96.h | 15 ++++++-- Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 40 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 3 ++ Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++ 6 files changed, 72 insertions(+), 4 deletions(-) -- 2.20.1