* [PATCH edk2-platforms 1/5] Silicon/SynQuacer: add missing SPI controller interrupt lines to DT
2019-05-29 12:50 [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Ard Biesheuvel
@ 2019-05-29 12:50 ` Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 2/5] Silicon/SynQuacer: add ACPI description of second SPI controller Ard Biesheuvel
` (3 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 12:50 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, masahisa.kojima, Ard Biesheuvel
Update the DT description of the second SPI controller with the TX,
RX and fault interrupt lines as they are assigned on SynQuacer.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 8559b5b329a7..f124a223816f 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -545,6 +545,9 @@
spi: spi@54810000 {
compatible = "socionext,synquacer-spi";
reg = <0x0 0x54810000 0x0 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_alw_1_8>;
clock-names = "iHCLK";
socionext,use-rtm;
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH edk2-platforms 2/5] Silicon/SynQuacer: add ACPI description of second SPI controller
2019-05-29 12:50 [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 1/5] Silicon/SynQuacer: add missing SPI controller interrupt lines to DT Ard Biesheuvel
@ 2019-05-29 12:50 ` Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property Ard Biesheuvel
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 12:50 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, masahisa.kojima, Ard Biesheuvel
The primary SPI controller on SynQuacer is reserved for the NOR
flash, and is not exposed to the OS. The second SPI controller is
wired to the low speed 96boards connector on DeveloperBox, and so
in order to use it, we must describe it to the OS (like we already
do in the device tree). So add the description to the DSDT as well.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 19 +++++++++++++++++++
Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++++
2 files changed, 23 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index c8d8120d262a..f6ff3988aa91 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -251,5 +251,24 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
Device (PWRB) {
Name (_HID, "PNP0C0C")
}
+
+ Device (SPI0) {
+ Name (_HID, "SCX0004")
+ Name (_UID, Zero)
+ Name (_CRS, ResourceTemplate () {
+ Memory32Fixed (ReadWrite, SYNQUACER_SPI1_BASE, SYNQUACER_SPI1_SIZE)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 192, 193, 194 }
+ })
+
+ Name (_DSD, Package () // _DSD: Device-Specific Data
+ {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package (2) { "socionext,ihclk-rate", 125000000 },
+ Package (2) { "socionext,use-rtm", 1 },
+ Package (2) { "socionext,set-aces", 1 },
+ }
+ })
+ }
} // Scope (_SB)
}
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index deb9c81e82e6..29c5f73f2057 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -78,4 +78,8 @@
#define SYNQUACER_UART1_BASE 0x51040000
#define SYNQUACER_UART1_SIZE SIZE_4KB
+// SPI controller #1
+#define SYNQUACER_SPI1_BASE 0x54810000
+#define SYNQUACER_SPI1_SIZE SIZE_4KB
+
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property
2019-05-29 12:50 [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 1/5] Silicon/SynQuacer: add missing SPI controller interrupt lines to DT Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 2/5] Silicon/SynQuacer: add ACPI description of second SPI controller Ard Biesheuvel
@ 2019-05-29 12:50 ` Ard Biesheuvel
2019-05-29 13:06 ` [edk2-devel] " Leif Lindholm
2019-05-29 12:50 ` [PATCH edk2-platforms 4/5] Platform/Secure96Dxe: add TPM description to SSDT Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 5/5] DO NOT MERGE - temporary hack to reset the TPM at probe time Ard Biesheuvel
4 siblings, 1 reply; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 12:50 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, masahisa.kojima, Ard Biesheuvel
As opposed to the Secure96's I2C peripherals, whose bus addresses are
properties of the peripherals themselves, the SPI CS address of the
TPM is a property of the platform that incorporates the LS connector.
So tweak the macros that emit the CS values and related properties
to put it under the control of the platform that incorporates the
driver.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +-
Platform/96Boards/Secure96Dxe/Secure96.h | 11 ++++++++---
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards/Secure96Dxe/Secure96.dts
index d066fcb1933c..0d7d9b3900a4 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.dts
+++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
@@ -39,7 +39,7 @@
__overlay__ {
INFINEON_SLB9670_DT_NODENAME {
compatible = "infineon,slb9670";
- reg = <INFINEON_SLB9670_SPI_CS>;
+ reg = <SECURE96_SPI0_CS>;
spi-max-frequency = <22500000>;
};
};
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
index c34fc5eea046..1d8bf4159209 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.h
+++ b/Platform/96Boards/Secure96Dxe/Secure96.h
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+ Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -8,14 +8,19 @@
#ifndef _SECURE96_H_
#define _SECURE96_H_
+#define __CONCAT(a,b) a ## b
+
#define ATSHA204A_SLAVE_ADDRESS 0x60
#define ATSHA204A_DT_NODENAME atsha204a@60
#define ATECC508A_SLAVE_ADDRESS 0x51
#define ATECC508A_DT_NODENAME atecc508a@51
-#define INFINEON_SLB9670_SPI_CS 0x0
-#define INFINEON_SLB9670_DT_NODENAME tpm@0
+#define INFINEON_SLB9670_DT_NODENAME __CONCAT(tpm@,SECURE96_SPI0_CS)
+
+#ifndef SECURE96_SPI0_CS
+#define SECURE96_SPI0_CS 0
+#endif
#ifndef SECURE96_ACPI_GPIO
#define SECURE96_ACPI_GPIO "\\_SB.GPIO"
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property
2019-05-29 12:50 ` [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property Ard Biesheuvel
@ 2019-05-29 13:06 ` Leif Lindholm
2019-05-29 13:14 ` Ard Biesheuvel
0 siblings, 1 reply; 10+ messages in thread
From: Leif Lindholm @ 2019-05-29 13:06 UTC (permalink / raw)
To: devel, ard.biesheuvel; +Cc: masahisa.kojima
On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> As opposed to the Secure96's I2C peripherals, whose bus addresses are
> properties of the peripherals themselves, the SPI CS address of the
> TPM is a property of the platform that incorporates the LS connector.
>
> So tweak the macros that emit the CS values and related properties
> to put it under the control of the platform that incorporates the
> driver.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +-
> Platform/96Boards/Secure96Dxe/Secure96.h | 11 ++++++++---
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards/Secure96Dxe/Secure96.dts
> index d066fcb1933c..0d7d9b3900a4 100644
> --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> @@ -39,7 +39,7 @@
> __overlay__ {
> INFINEON_SLB9670_DT_NODENAME {
> compatible = "infineon,slb9670";
> - reg = <INFINEON_SLB9670_SPI_CS>;
> + reg = <SECURE96_SPI0_CS>;
> spi-max-frequency = <22500000>;
> };
> };
> diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
> index c34fc5eea046..1d8bf4159209 100644
> --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> + Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
> **/
> @@ -8,14 +8,19 @@
> #ifndef _SECURE96_H_
> #define _SECURE96_H_
>
> +#define __CONCAT(a,b) a ## b
> +
Urgh. We badly need to properly add some official macros for this.
You could possibly use __CONCATENATE from Base.h.
For new macros, we really should avoid leading _.
/
Leif
> #define ATSHA204A_SLAVE_ADDRESS 0x60
> #define ATSHA204A_DT_NODENAME atsha204a@60
>
> #define ATECC508A_SLAVE_ADDRESS 0x51
> #define ATECC508A_DT_NODENAME atecc508a@51
>
> -#define INFINEON_SLB9670_SPI_CS 0x0
> -#define INFINEON_SLB9670_DT_NODENAME tpm@0
> +#define INFINEON_SLB9670_DT_NODENAME __CONCAT(tpm@,SECURE96_SPI0_CS)
> +
> +#ifndef SECURE96_SPI0_CS
> +#define SECURE96_SPI0_CS 0
> +#endif
>
> #ifndef SECURE96_ACPI_GPIO
> #define SECURE96_ACPI_GPIO "\\_SB.GPIO"
> --
> 2.20.1
>
>
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property
2019-05-29 13:06 ` [edk2-devel] " Leif Lindholm
@ 2019-05-29 13:14 ` Ard Biesheuvel
2019-05-29 14:43 ` Leif Lindholm
0 siblings, 1 reply; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 13:14 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-groups-io, Masahisa Kojima
On Wed, 29 May 2019 at 15:06, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>
> On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> > As opposed to the Secure96's I2C peripherals, whose bus addresses are
> > properties of the peripherals themselves, the SPI CS address of the
> > TPM is a property of the platform that incorporates the LS connector.
> >
> > So tweak the macros that emit the CS values and related properties
> > to put it under the control of the platform that incorporates the
> > driver.
> >
> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > ---
> > Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +-
> > Platform/96Boards/Secure96Dxe/Secure96.h | 11 ++++++++---
> > 2 files changed, 9 insertions(+), 4 deletions(-)
> >
> > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > index d066fcb1933c..0d7d9b3900a4 100644
> > --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> > +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > @@ -39,7 +39,7 @@
> > __overlay__ {
> > INFINEON_SLB9670_DT_NODENAME {
> > compatible = "infineon,slb9670";
> > - reg = <INFINEON_SLB9670_SPI_CS>;
> > + reg = <SECURE96_SPI0_CS>;
> > spi-max-frequency = <22500000>;
> > };
> > };
> > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
> > index c34fc5eea046..1d8bf4159209 100644
> > --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> > +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> > @@ -1,6 +1,6 @@
> > /** @file
> >
> > - Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> > + Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.<BR>
> >
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> > **/
> > @@ -8,14 +8,19 @@
> > #ifndef _SECURE96_H_
> > #define _SECURE96_H_
> >
> > +#define __CONCAT(a,b) a ## b
> > +
>
> Urgh. We badly need to properly add some official macros for this.
> You could possibly use __CONCATENATE from Base.h.
>
OK, I'll use that instead.
> For new macros, we really should avoid leading _.
>
True.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property
2019-05-29 13:14 ` Ard Biesheuvel
@ 2019-05-29 14:43 ` Leif Lindholm
2019-05-29 18:03 ` Ard Biesheuvel
0 siblings, 1 reply; 10+ messages in thread
From: Leif Lindholm @ 2019-05-29 14:43 UTC (permalink / raw)
To: devel, ard.biesheuvel; +Cc: Masahisa Kojima
On Wed, May 29, 2019 at 03:14:48PM +0200, Ard Biesheuvel wrote:
> On Wed, 29 May 2019 at 15:06, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> >
> > On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> > > As opposed to the Secure96's I2C peripherals, whose bus addresses are
> > > properties of the peripherals themselves, the SPI CS address of the
> > > TPM is a property of the platform that incorporates the LS connector.
> > >
> > > So tweak the macros that emit the CS values and related properties
> > > to put it under the control of the platform that incorporates the
> > > driver.
> > >
> > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > > ---
> > > Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +-
> > > Platform/96Boards/Secure96Dxe/Secure96.h | 11 ++++++++---
> > > 2 files changed, 9 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > index d066fcb1933c..0d7d9b3900a4 100644
> > > --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > @@ -39,7 +39,7 @@
> > > __overlay__ {
> > > INFINEON_SLB9670_DT_NODENAME {
> > > compatible = "infineon,slb9670";
> > > - reg = <INFINEON_SLB9670_SPI_CS>;
> > > + reg = <SECURE96_SPI0_CS>;
> > > spi-max-frequency = <22500000>;
> > > };
> > > };
> > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > index c34fc5eea046..1d8bf4159209 100644
> > > --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > @@ -1,6 +1,6 @@
> > > /** @file
> > >
> > > - Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> > > + Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.<BR>
> > >
> > > SPDX-License-Identifier: BSD-2-Clause-Patent
> > > **/
> > > @@ -8,14 +8,19 @@
> > > #ifndef _SECURE96_H_
> > > #define _SECURE96_H_
> > >
> > > +#define __CONCAT(a,b) a ## b
> > > +
> >
> > Urgh. We badly need to properly add some official macros for this.
> > You could possibly use __CONCATENATE from Base.h.
> >
>
> OK, I'll use that instead.
With that, for 1-4/5:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> > For new macros, we really should avoid leading _.
> >
>
> True.
>
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property
2019-05-29 14:43 ` Leif Lindholm
@ 2019-05-29 18:03 ` Ard Biesheuvel
0 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 18:03 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-groups-io, Masahisa Kojima
On Wed, 29 May 2019 at 16:43, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>
> On Wed, May 29, 2019 at 03:14:48PM +0200, Ard Biesheuvel wrote:
> > On Wed, 29 May 2019 at 15:06, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > >
> > > On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> > > > As opposed to the Secure96's I2C peripherals, whose bus addresses are
> > > > properties of the peripherals themselves, the SPI CS address of the
> > > > TPM is a property of the platform that incorporates the LS connector.
> > > >
> > > > So tweak the macros that emit the CS values and related properties
> > > > to put it under the control of the platform that incorporates the
> > > > driver.
> > > >
> > > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > > > ---
> > > > Platform/96Boards/Secure96Dxe/Secure96.dts | 2 +-
> > > > Platform/96Boards/Secure96Dxe/Secure96.h | 11 ++++++++---
> > > > 2 files changed, 9 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > index d066fcb1933c..0d7d9b3900a4 100644
> > > > --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > @@ -39,7 +39,7 @@
> > > > __overlay__ {
> > > > INFINEON_SLB9670_DT_NODENAME {
> > > > compatible = "infineon,slb9670";
> > > > - reg = <INFINEON_SLB9670_SPI_CS>;
> > > > + reg = <SECURE96_SPI0_CS>;
> > > > spi-max-frequency = <22500000>;
> > > > };
> > > > };
> > > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > index c34fc5eea046..1d8bf4159209 100644
> > > > --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > @@ -1,6 +1,6 @@
> > > > /** @file
> > > >
> > > > - Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> > > > + Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.<BR>
> > > >
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > **/
> > > > @@ -8,14 +8,19 @@
> > > > #ifndef _SECURE96_H_
> > > > #define _SECURE96_H_
> > > >
> > > > +#define __CONCAT(a,b) a ## b
> > > > +
> > >
> > > Urgh. We badly need to properly add some official macros for this.
> > > You could possibly use __CONCATENATE from Base.h.
> > >
> >
> > OK, I'll use that instead.
>
> With that, for 1-4/5:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks
Pushed as c587c76bec49..f36ee841e0ec
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH edk2-platforms 4/5] Platform/Secure96Dxe: add TPM description to SSDT
2019-05-29 12:50 [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Ard Biesheuvel
` (2 preceding siblings ...)
2019-05-29 12:50 ` [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property Ard Biesheuvel
@ 2019-05-29 12:50 ` Ard Biesheuvel
2019-05-29 12:50 ` [PATCH edk2-platforms 5/5] DO NOT MERGE - temporary hack to reset the TPM at probe time Ard Biesheuvel
4 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 12:50 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, masahisa.kojima, Ard Biesheuvel
Add a description of the Secure96's TPM over SPI to the SSDT that
is exposed to the OS by the Secure96Dxe driver.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/96Boards/Secure96Dxe/Secure96.asl | 12 ++++++++++++
Platform/96Boards/Secure96Dxe/Secure96.h | 4 ++++
2 files changed, 16 insertions(+)
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.asl b/Platform/96Boards/Secure96Dxe/Secure96.asl
index 4018d437246f..64b6e3b2adbe 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.asl
+++ b/Platform/96Boards/Secure96Dxe/Secure96.asl
@@ -105,5 +105,17 @@ DefinitionBlock ("Secure96.aml", "SSDT", 2, "96BRDS", "SECURE96", 1)
I2CSerialBus (ATECC508A_SLAVE_ADDRESS,, 100000,, SECURE96_ACPI_I2C0,,,,)
})
}
+
+ Device (TP96)
+ {
+ Name (_ADR, SECURE96_SPI0_CS)
+ Name (_CID, "SMO0768")
+ Name (_CRS, ResourceTemplate() {
+ SpiSerialBus (SECURE96_SPI0_CS, PolarityLow, FourWireMode,
+ 8, ControllerInitiated, 5000000, ClockPolarityLow,
+ ClockPhaseFirst, SECURE96_ACPI_SPI0, 0,
+ ResourceConsumer)
+ })
+ }
}
}
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
index 1d8bf4159209..231d8a47ef7b 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.h
+++ b/Platform/96Boards/Secure96Dxe/Secure96.h
@@ -30,4 +30,8 @@
#define SECURE96_ACPI_I2C0 "\\_SB.I2C0"
#endif
+#ifndef SECURE96_ACPI_SPI0
+#define SECURE96_ACPI_SPI0 "\\_SB.SPI0"
+#endif
+
#endif // _SECURE96_H_
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH edk2-platforms 5/5] DO NOT MERGE - temporary hack to reset the TPM at probe time
2019-05-29 12:50 [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support Ard Biesheuvel
` (3 preceding siblings ...)
2019-05-29 12:50 ` [PATCH edk2-platforms 4/5] Platform/Secure96Dxe: add TPM description to SSDT Ard Biesheuvel
@ 2019-05-29 12:50 ` Ard Biesheuvel
4 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2019-05-29 12:50 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, masahisa.kojima, Ard Biesheuvel
---
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 21 ++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index f6ff3988aa91..4761d320cc22 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -246,6 +246,27 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
Method (_E08) {
Notify (\_SB.PWRB, 0x80)
}
+
+ OperationRegion (GPOP, GeneralPurposeIo, Zero, 0x20)
+ Field (GPOP, ByteAcc, NoLock, Preserve)
+ {
+ Connection (
+ GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
+ "\\_SB.GPIO", 0x00, ResourceConsumer,,)
+ {
+ 13
+ }
+ ),
+ TRST, 1,
+ }
+
+ Method (_REG, 2, Serialized)
+ {
+ Sleep (100)
+ Store (Zero, TRST)
+ Sleep (100)
+ Store (One, TRST)
+ }
}
Device (PWRB) {
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread