From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=GWHOot0h; spf=pass (domain: linaro.org, ip: 209.85.221.66, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Wed, 29 May 2019 05:50:32 -0700 Received: by mail-wr1-f66.google.com with SMTP id b18so1658237wrq.12 for ; Wed, 29 May 2019 05:50:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yPPhr7jlQaIu+6/7VJENy/MLVxd5as4v7OK1sRy/Je0=; b=GWHOot0hfrNqQTMXk2uoSkpeQTT15GjsxHoiqGAfn1o1bHbsM0tPcuEYjdS730gWJx r7XUcXUeGlc9ISdWvpVKMaGnQ/589qAIzFvSuNo454KQYe11hYxD7DZQjOaFTNyazJcY KOyV2W4l6oX1MHu1GpQ9TzlxfVUHxZtYmkw3OCZMTaHsoN0jMeYhdG8a4cAxYVhaDVFh T0mhO0O7fHgmi8Obfk/4rPfxBg9aODe3XUyuSr/YsW8kb1f7sLFy07qDq5GWd4/Wtmsg HUgpvihme/7G+BfH3NksTkJvnXsy5dqHCj83E5ZkPqmOLhy+KaTnm2gynU3FlZYzX7dx rgJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yPPhr7jlQaIu+6/7VJENy/MLVxd5as4v7OK1sRy/Je0=; b=kanqPgfu8cFChr0e/AxN6BlMhTzGuvFym5K6cMpjmytgA/5VIcFdorCEsZS9AgxUVU ZH8B2dk2TmCOFdRWBI3aNLqobylAPZdry/ght93Hc5ObeRvNF0bcumk9KZa7KrDF7hXN il9LGlycA0aJHagx9tQVd7irPydOyaStqF6Ge9rDF+9PB0Ospxs3VQTVBZ5bE/tCsrKx jraVnz1ddLONCq69VUE5btXxwHT5sZ+lb59wcT42dclEt87OHDOpvX4/HbSXyKqJKaBH DLP/2U3Vkr6rLOBoDNx0e0hzrydW0TrLTAo6/85sCImpCbirviz0BrYppsxwF97W7bSC vveQ== X-Gm-Message-State: APjAAAUhuj6BEk14WrC4TUl+cEZm5CDV/ST8hIzBK+WDtRl7tDNQxB6+ Isu02ywDEHnv0R3Dn4N0SJzKVJb8XSW89g== X-Google-Smtp-Source: APXvYqxObVBlnaPmGyPLrkJSbFuhcHHjDxZJxT6+atqWRU1BBofw0vrYnp42A7V2uG6BsVAIbJ/f4g== X-Received: by 2002:a5d:628d:: with SMTP id k13mr23593672wru.319.1559134230297; Wed, 29 May 2019 05:50:30 -0700 (PDT) Return-Path: Received: from sudo.home ([2a01:cb1d:112:6f00:c225:e9ff:fe2e:ea8]) by smtp.gmail.com with ESMTPSA id l18sm18112608wrv.38.2019.05.29.05.50.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 29 May 2019 05:50:29 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, masahisa.kojima@linaro.org, Ard Biesheuvel Subject: [PATCH edk2-platforms 4/5] Platform/Secure96Dxe: add TPM description to SSDT Date: Wed, 29 May 2019 14:50:20 +0200 Message-Id: <20190529125021.28308-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190529125021.28308-1-ard.biesheuvel@linaro.org> References: <20190529125021.28308-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a description of the Secure96's TPM over SPI to the SSDT that is exposed to the OS by the Secure96Dxe driver. Signed-off-by: Ard Biesheuvel --- Platform/96Boards/Secure96Dxe/Secure96.asl | 12 ++++++++++++ Platform/96Boards/Secure96Dxe/Secure96.h | 4 ++++ 2 files changed, 16 insertions(+) diff --git a/Platform/96Boards/Secure96Dxe/Secure96.asl b/Platform/96Boards/Secure96Dxe/Secure96.asl index 4018d437246f..64b6e3b2adbe 100644 --- a/Platform/96Boards/Secure96Dxe/Secure96.asl +++ b/Platform/96Boards/Secure96Dxe/Secure96.asl @@ -105,5 +105,17 @@ DefinitionBlock ("Secure96.aml", "SSDT", 2, "96BRDS", "SECURE96", 1) I2CSerialBus (ATECC508A_SLAVE_ADDRESS,, 100000,, SECURE96_ACPI_I2C0,,,,) }) } + + Device (TP96) + { + Name (_ADR, SECURE96_SPI0_CS) + Name (_CID, "SMO0768") + Name (_CRS, ResourceTemplate() { + SpiSerialBus (SECURE96_SPI0_CS, PolarityLow, FourWireMode, + 8, ControllerInitiated, 5000000, ClockPolarityLow, + ClockPhaseFirst, SECURE96_ACPI_SPI0, 0, + ResourceConsumer) + }) + } } } diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h index 1d8bf4159209..231d8a47ef7b 100644 --- a/Platform/96Boards/Secure96Dxe/Secure96.h +++ b/Platform/96Boards/Secure96Dxe/Secure96.h @@ -30,4 +30,8 @@ #define SECURE96_ACPI_I2C0 "\\_SB.I2C0" #endif +#ifndef SECURE96_ACPI_SPI0 +#define SECURE96_ACPI_SPI0 "\\_SB.SPI0" +#endif + #endif // _SECURE96_H_ -- 2.20.1