From: "Laszlo Ersek" <lersek@redhat.com>
To: edk2-devel-groups-io <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Gerd Hoffmann <kraxel@redhat.com>,
Jordan Justen <jordan.l.justen@intel.com>
Subject: [PATCH for-edk2-stable201905 4/6] Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly"
Date: Wed, 29 May 2019 17:12:07 +0200 [thread overview]
Message-ID: <20190529151209.17503-5-lersek@redhat.com> (raw)
In-Reply-To: <20190529151209.17503-1-lersek@redhat.com>
This reverts commit 60e95bf5094fbb9b728729ccfaf32184b3662317.
The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814>
triggered a bug / incorrect assumption in QEMU.
QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.
Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/PlatformPei/Platform.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 5e0a15484230..0876316eefbc 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -190,10 +190,8 @@ MemMapInitialization (
ASSERT (TopOfLowRam <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
- PciSize = 0xFC000000 - PciBase;
} else {
PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
- PciSize = 0xFC000000 - PciBase;
}
//
@@ -209,6 +207,7 @@ MemMapInitialization (
// 0xFED20000 gap 896 KB
// 0xFEE00000 LAPIC 1 MB
//
+ PciSize = 0xFC000000 - PciBase;
AddIoMemoryBaseSizeHob (PciBase, PciSize);
PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
ASSERT_RETURN_ERROR (PcdStatus);
--
2.19.1.3.g30247aa5d201
next prev parent reply other threads:[~2019-05-29 15:12 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 15:12 [PATCH for-edk2-stable201905 0/6] work around a QEMU issue triggered by the original TianoCore#1814 fix Laszlo Ersek
2019-05-29 15:12 ` [PATCH for-edk2-stable201905 1/6] Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits clear" Laszlo Ersek
2019-05-29 15:24 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-05-29 15:12 ` [PATCH for-edk2-stable201905 2/6] Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR on q35" Laszlo Ersek
2019-05-29 15:24 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-05-29 15:12 ` [PATCH for-edk2-stable201905 3/6] Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 branching" Laszlo Ersek
2019-05-29 15:25 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-05-29 15:12 ` Laszlo Ersek [this message]
2019-05-29 15:25 ` [edk2-devel] [PATCH for-edk2-stable201905 4/6] Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly" Philippe Mathieu-Daudé
2019-05-29 15:12 ` [PATCH for-edk2-stable201905 5/6] OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35 Laszlo Ersek
2019-05-29 16:36 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-05-29 15:12 ` [PATCH for-edk2-stable201905 6/6] OvmfPkg/PlatformPei: set 32-bit UC area at PciBase / PciExBarBase (pc/q35) Laszlo Ersek
2019-06-03 11:07 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-05-29 15:20 ` [PATCH for-edk2-stable201905 0/6] work around a QEMU issue triggered by the original TianoCore#1814 fix Ard Biesheuvel
2019-06-03 18:10 ` [edk2-devel] " Laszlo Ersek
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