From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: hao.a.wu@intel.com) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by groups.io with SMTP; Thu, 30 May 2019 00:57:18 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 May 2019 00:57:18 -0700 X-ExtLoop1: 1 Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga008.fm.intel.com with ESMTP; 30 May 2019 00:57:17 -0700 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Ray Ni , Maggie Chu , Jian J Wang Subject: [PATCH v1] MdeModulePkg/AhciPei: Fix device cannot be found in non-S3 path Date: Thu, 30 May 2019 15:57:15 +0800 Message-Id: <20190530075715.1112-1-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1862 Current implementation of function AhciModeInitialization() has an incorrect assumption that the value in the CAP (offset 00h) register will always be greater than the highest bit set for the value in the PI (offset 0Ch) register. This will lead to an issue that hard disk devices may not be found in the non-S3 boot path for some AHCI controller capabilities. More specifically, variable 'PortInitializeBitMap' will have the value from 'Private->PortBitMap', which will be 0xFFFFFFFF in non-S3 boot path. When the CAP register is of value 0x1 and PI register with value 0x4 (meaning port 2 is available), the current logic will only enumerate port 0. And the device attached behind port 2 will not be enumerated. To address this issue, variable 'PortInitializeBitMap' will now take the bitwise and result between 'Private->PortBitMap' and the value read from the PI register. Please note that there will be no function impact for S3 path, since in this case, the bits being set in 'Private->PortBitMap' will be a subset of the bits being set in the PI register. Their bitwise and operation will still be the value of 'Private->PortBitMap'. Cc: Ray Ni Cc: Maggie Chu Cc: Jian J Wang Signed-off-by: Hao A Wu --- MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c index 7287f8290e..8c491bd138 100644 --- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c @@ -1713,7 +1713,7 @@ AhciModeInitialization ( MaxPortNumber = MIN (MaxPortNumber, (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1)); MaxPortNumber = MIN (MaxPortNumber, AhciGetNumberOfPortsFromMap (Private->PortBitMap)); - PortInitializeBitMap = Private->PortBitMap; + PortInitializeBitMap = Private->PortBitMap & PortImplementBitMap; AhciRegisters = &Private->AhciRegisters; DeviceIndex = 0; // @@ -1721,6 +1721,13 @@ AhciModeInitialization ( // for (PortIndex = 1; PortIndex <= MaxPortNumber; PortIndex ++) { Status = AhciGetPortFromMap (PortInitializeBitMap, PortIndex, &Port); + if (EFI_ERROR (Status)) { + // + // No more available port, just break out of the loop. + // + break; + } + if ((PortImplementBitMap & (BIT0 << Port)) != 0) { // // Initialize FIS Base Address Register and Command List Base Address -- 2.12.0.windows.1