From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: devel@edk2.groups.io
Cc: "Chasel, Chiu" <chasel.chiu@intel.com>,
Nate DeSimone <nathaniel.l.desimone@intel.com>,
Michael A Kubacki <michael.a.kubacki@intel.com>,
Sai Chaganty <rangasai.v.chaganty@intel.com>
Subject: [PATCH 1/2] KabylakeSiliconPkg: FSP 2.1 SEC handling.
Date: Fri, 31 May 2019 19:42:50 +0800 [thread overview]
Message-ID: <20190531114251.12024-2-chasel.chiu@intel.com> (raw)
In-Reply-To: <20190531114251.12024-1-chasel.chiu@intel.com>
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1865
To support FSP Dispatch mode, PlatformSecLib should
consume FSP_TEMP_RAM_EXIT_PPI to disable temporary
memory. This patch added the definition of this
FSP_TEMP_RAM_EXIT_PPI.
Test: API mode no impact and can still booted.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 2 ++
2 files changed, 52 insertions(+)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h b/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h
new file mode 100644
index 0000000000..9e728a5d4d
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h
@@ -0,0 +1,50 @@
+/** @file
+ This file defines the Silicon Temp Ram Exit PPI which implements the
+ required programming steps for disabling temporary memory.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FSP_TEMP_RAM_EXIT_PPI_H_
+#define _FSP_TEMP_RAM_EXIT_PPI_H_
+
+///
+/// Global ID for the FSP_TEMP_RAM_EXIT_PPI.
+///
+#define FSP_TEMP_RAM_EXIT_GUID \
+ { \
+ 0xbc1cfbdb, 0x7e50, 0x42be, { 0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52 } \
+ }
+
+//
+// Forward declaration for the FSP_TEMP_RAM_EXIT_PPI.
+//
+typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI;
+
+/**
+ Silicon function for disabling temporary memory.
+ @param[in] TempRamExitParamPtr - Pointer to the TempRamExit parameters structure.
+ This structure is normally defined in the Integration
+ Guide. If it is not defined in the Integration Guide,
+ pass NULL.
+ @retval EFI_SUCCESS - Execution was completed successfully.
+ @retval Status - Error status reported by sub-functions if implemented.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FSP_TEMP_RAM_EXIT) (
+ IN VOID *TempRamExitParamPtr
+ );
+
+///
+/// This PPI provides function to disable temporary memory.
+///
+struct _FSP_TEMP_RAM_EXIT_PPI {
+ FSP_TEMP_RAM_EXIT TempRamExit;
+};
+
+extern EFI_GUID gFspTempRamExitPpiGuid;
+
+#endif // _FSP_TEMP_RAM_EXIT_PPI_H_
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index a613079dd4..874cbee7a7 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -347,6 +347,8 @@ gPeiTpmInitializationDonePpiGuid = {0xa030d115, 0x54dd, 0x447b, { 0x90, 0x64, 0x
##
gSiPolicyPpiGuid = {0xaebffa01, 0x7edc, 0x49ff, {0x8d, 0x88, 0xcb, 0x84, 0x8c, 0x5e, 0x86, 0x70}}
gSiPreMemPolicyPpiGuid = {0xc133fe57, 0x17c7, 0x4b09, {0x8b, 0x3c, 0x97, 0xc1, 0x89, 0xd0, 0xab, 0x8d}}
+gFspTempRamExitPpiGuid = {0xbc1cfbdb, 0x7e50, 0x42be, {0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52}}
+
##
## SystemAgent
##
--
2.19.1.windows.1
next prev parent reply other threads:[~2019-05-31 11:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 11:42 [PATCH 0/2] Kabylake*Pkg: FSP 2.1 SEC handling Chiu, Chasel
2019-05-31 11:42 ` Chiu, Chasel [this message]
2019-06-05 19:52 ` [edk2-devel] [PATCH 1/2] KabylakeSiliconPkg: " Nate DeSimone
2019-06-06 6:05 ` Chiu, Chasel
2019-06-06 9:45 ` Nate DeSimone
2019-05-31 11:42 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
2019-06-05 19:58 ` [edk2-devel] " Nate DeSimone
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190531114251.12024-2-chasel.chiu@intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox