From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: redhat.com, ip: 209.132.183.28, mailfrom: lersek@redhat.com) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by groups.io with SMTP; Tue, 04 Jun 2019 14:44:41 -0700 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 56A1FA3B64; Tue, 4 Jun 2019 21:44:30 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-117-251.ams2.redhat.com [10.36.117.251]) by smtp.corp.redhat.com (Postfix) with ESMTP id A0BCA19C69; Tue, 4 Jun 2019 21:44:26 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Alex Williamson , Hao A Wu , Jian J Wang , Ray Ni , Star Zeng Subject: [PATCH for-next] MdeModulePkg/PciBusDxe: catch unimplemented extended config space reads Date: Tue, 4 Jun 2019 23:44:24 +0200 Message-Id: <20190604214424.456-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 04 Jun 2019 21:44:35 +0000 (UTC) Content-Transfer-Encoding: quoted-printable When assigning a physical PCIe device to a QEMU/KVM guest, PciBusDxe may find that the extended config space is not (fully) implemented. In LocatePciExpressCapabilityRegBlock(), "CapabilityEntry" may be read as 0xFFFF_FFFF at a given config space offset, after which the loop gets stuck spinning on offset 0xFFC (the read at offset 0xFFC returns 0xFFFF_FFFF most likely as well). Another scenario (not related to virtualization) for triggering the above is when a Conventional PCI bus -- exposed by a PCIe-to-PCI bridge in the topology -- intervenes between a PCI Express Root Port and a PCI Express Endpoint. The Conventional PCI bus limits the accessible config space of the PCI Express Endpoint, even though the endpoint advertizes the PCI Express capability. Here's a diagram, courtesy of Alex Williamson: [PCIe Root Port]--[PCIe-to-PCI]--[PCI-to-PCIe]--[PCIe EP] ->| |<- Conventional PCI bus Catch reads of 0xFFFF_FFFF in LocatePciExpressCapabilityRegBlock(), and break out of the scan with a warning message. The function will return EFI_NOT_FOUND. Cc: Alex Williamson Cc: Hao A Wu Cc: Jian J Wang Cc: Ray Ni Cc: Star Zeng Signed-off-by: Laszlo Ersek --- Notes: Repo: https://github.com/lersek/edk2.git Branch: pcibus_no_ext_conf MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/B= us/Pci/PciBusDxe/PciCommand.c index 214aeecdd40a..6283d602207c 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c @@ -236,6 +236,19 @@ LocatePciExpressCapabilityRegBlock ( break; } =20 + if (CapabilityEntry =3D=3D MAX_UINT32) { + DEBUG (( + DEBUG_WARN, + "%a: [%02x|%02x|%02x] failed to access config space at offset 0x= %x\n", + __FUNCTION__, + PciIoDevice->BusNumber, + PciIoDevice->DeviceNumber, + PciIoDevice->FunctionNumber, + CapabilityPtr + )); + break; + } + CapabilityID =3D (UINT16) CapabilityEntry; =20 if (CapabilityID =3D=3D CapId) { --=20 2.19.1.3.g30247aa5d201