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From: "Ni, Ray" <ray.ni@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging
Date: Wed,  3 Jul 2019 14:54:15 +0800	[thread overview]
Message-ID: <20190703065416.116816-3-ray.ni@intel.com> (raw)
In-Reply-To: <20190703065416.116816-1-ray.ni@intel.com>

5-level paging is documented in white paper:
https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf

Commit f8113e25001e715390127f23e2197252cbd6d1a2
changed Cpuid.h already.

This patch updates IA32_CR4 structure to include LA57 field.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
---
 MdePkg/Include/Library/BaseLib.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index ebd7dd274c..a22bfc9fad 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -5324,7 +5324,8 @@ typedef union {
     UINT32  OSXMMEXCPT:1;   ///< Operating System Support for
                             ///< Unmasked SIMD Floating Point
                             ///< Exceptions.
-    UINT32  Reserved_0:2;   ///< Reserved.
+    UINT32  Reserved_2:1;   ///< Reserved.
+    UINT32  LA57:1;         ///< Linear Address 57bit.
     UINT32  VMXE:1;         ///< VMX Enable
     UINT32  Reserved_1:18;  ///< Reserved.
   } Bits;
-- 
2.21.0.windows.1


  parent reply	other threads:[~2019-07-03  6:54 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-03  6:54 [PATCH v2 0/3] Enable 5 level paging in SMM mode Ni, Ray
2019-07-03  6:54 ` [PATCH v2 1/3] UefiCpuPkg/PiSmmCpu: Change variable names and comments to follow SDM Ni, Ray
2019-07-09  1:08   ` [edk2-devel] " Dong, Eric
2019-07-03  6:54 ` Ni, Ray [this message]
2019-07-09  1:04   ` [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging Dong, Eric
2019-07-10 17:17     ` [edk2-devel] " Laszlo Ersek
2019-07-10 19:38       ` Michael D Kinney
2019-07-11  3:25         ` Ni, Ray
2019-07-11  4:05           ` Ni, Ray
2019-07-11 12:12             ` Laszlo Ersek
2019-07-11 12:29           ` Laszlo Ersek
2019-07-11 12:17         ` Laszlo Ersek
2019-07-03  6:54 ` [PATCH v2 3/3] UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supports Ni, Ray
2019-07-09 13:33   ` Dong, Eric
2019-07-10 20:06   ` [edk2-devel] " Michael D Kinney
2019-07-11  1:19     ` Ni, Ray
2019-07-11 12:17       ` Laszlo Ersek

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