From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: ray.ni@intel.com) Received: from mga02.intel.com (mga02.intel.com []) by groups.io with SMTP; Tue, 02 Jul 2019 23:54:48 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Jul 2019 23:54:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,446,1557212400"; d="scan'208";a="247523169" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.16]) by orsmga001.jf.intel.com with ESMTP; 02 Jul 2019 23:54:46 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Laszlo Ersek Subject: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging Date: Wed, 3 Jul 2019 14:54:15 +0800 Message-Id: <20190703065416.116816-3-ray.ni@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190703065416.116816-1-ray.ni@intel.com> References: <20190703065416.116816-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5-level paging is documented in white paper: https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf Commit f8113e25001e715390127f23e2197252cbd6d1a2 changed Cpuid.h already. This patch updates IA32_CR4 structure to include LA57 field. Signed-off-by: Ray Ni Cc: Eric Dong Regression-tested-by: Laszlo Ersek --- MdePkg/Include/Library/BaseLib.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index ebd7dd274c..a22bfc9fad 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -5324,7 +5324,8 @@ typedef union { UINT32 OSXMMEXCPT:1; ///< Operating System Support for ///< Unmasked SIMD Floating Point ///< Exceptions. - UINT32 Reserved_0:2; ///< Reserved. + UINT32 Reserved_2:1; ///< Reserved. + UINT32 LA57:1; ///< Linear Address 57bit. UINT32 VMXE:1; ///< VMX Enable UINT32 Reserved_1:18; ///< Reserved. } Bits; -- 2.21.0.windows.1