From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: citrix.com, ip: , mailfrom: anthony.perard@citrix.com) Received: from esa2.hc3370-68.iphmx.com (esa2.hc3370-68.iphmx.com []) by groups.io with SMTP; Thu, 04 Jul 2019 07:42:39 -0700 Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=anthony.perard@citrix.com; spf=Pass smtp.mailfrom=anthony.perard@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of anthony.perard@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="anthony.perard@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa2.hc3370-68.iphmx.com: domain of anthony.perard@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="anthony.perard@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ~all" Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: e3aeL0hkoFld3nP/bMLrhKmsxsWofztx6A8gStIF4QYlq0X/rO9spehq526rkOyDedAEO9zj9e e9DcXNLELM/4MArx/ldyJC0MDm6LScxR2OHJrqRP9l4sNNJxpLor51FOBw6a9TMcvYTWdMkW9R FhwZnLkJyyJt9f90vtbbR9Fi+dIyClG8zu7l0LFxKiS0wFVtV3Lm5IQlRkeAIqz1hGGUjmKIqr JxAODj3aAq5JMDTGfkDwLWqhjJfVNG1FnOkgge6LTpM4mPOnLvp95PGq+dV1i5zUXiVkHMVXLp foU= X-SBRS: 2.7 X-MesageID: 2588787 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,451,1557201600"; d="scan'208";a="2588787" From: "Anthony PERARD" To: CC: , Ard Biesheuvel , Jordan Justen , Laszlo Ersek , Julien Grall , Anthony PERARD , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v3 06/35] OvmfPkg/XenResetVector: Add new entry point for Xen PVH Date: Thu, 4 Jul 2019 15:42:04 +0100 Message-ID: <20190704144233.27968-7-anthony.perard@citrix.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190704144233.27968-1-anthony.perard@citrix.com> References: <20190704144233.27968-1-anthony.perard@citrix.com> MIME-Version: 1.0 Return-Path: anthony.perard@citrix.com Content-Transfer-Encoding: quoted-printable Content-Type: text/plain Add a new entry point for Xen PVH that enter directly in 32bits. Information on the expected state of the machine when this entry point is used can be found at: https://xenbits.xenproject.org/docs/unstable/misc/pvh.html Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1689 Signed-off-by: Anthony PERARD --- Notes: v3: - rebased, SPDX - remove `cli' as via PVH the interrupts are guaranteed to be off - rewrite some comments .../XenResetVector/Ia16/ResetVectorVtf0.asm | 81 +++++++++++++++++++ OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm | 49 +++++++++++ OvmfPkg/XenResetVector/XenResetVector.nasmb | 1 + 3 files changed, 131 insertions(+) create mode 100644 OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm create mode 100644 OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenR= esetVector/Ia16/ResetVectorVtf0.asm new file mode 100644 index 0000000000..958195bc5e --- /dev/null +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm @@ -0,0 +1,81 @@ +;-------------------------------------------------------------------------= -----=0D +; @file=0D +; First code executed by processor after resetting.=0D +;=0D +; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
=0D +; Copyright (c) 2019, Citrix Systems, Inc.=0D +;=0D +; SPDX-License-Identifier: BSD-2-Clause-Patent=0D +;=0D +;-------------------------------------------------------------------------= -----=0D +=0D +BITS 16=0D +=0D +ALIGN 16=0D +=0D +;=0D +; Pad the image size to 4k when page tables are in VTF0=0D +;=0D +; If the VTF0 image has page tables built in, then we need to make=0D +; sure the end of VTF0 is 4k above where the page tables end.=0D +;=0D +; This is required so the page tables will be 4k aligned when VTF0 is=0D +; located just below 0x100000000 (4GB) in the firmware device.=0D +;=0D +%ifdef ALIGN_TOP_TO_4K_FOR_PAGING=0D + TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPo= int)) DB 0=0D +%endif=0D +=0D +BITS 32=0D +xenPVHEntryPoint:=0D +;=0D +; Entry point to use when running as a Xen PVH guest. (0xffffffd0)=0D +;=0D +; Description of the expected state of the machine when this entry point i= s=0D +; used can be found at:=0D +; https://xenbits.xenproject.org/docs/unstable/misc/pvh.html=0D +;=0D + jmp xenPVHMain=0D +=0D +BITS 16=0D +ALIGN 16=0D +=0D +applicationProcessorEntryPoint:=0D +;=0D +; Application Processors entry point=0D +;=0D +; GenFv generates code aligned on a 4k boundary which will jump to this=0D +; location. (0xffffffe0) This allows the Local APIC Startup IPI to be=0D +; used to wake up the application processors.=0D +;=0D + jmp EarlyApInitReal16=0D +=0D +ALIGN 8=0D +=0D + DD 0=0D +=0D +;=0D +; The VTF signature=0D +;=0D +; VTF-0 means that the VTF (Volume Top File) code does not require=0D +; any fixups.=0D +;=0D +vtfSignature:=0D + DB 'V', 'T', 'F', 0=0D +=0D +ALIGN 16=0D +=0D +resetVector:=0D +;=0D +; Reset Vector=0D +;=0D +; This is where the processor will begin execution=0D +;=0D + nop=0D + nop=0D + jmp EarlyBspInitReal16=0D +=0D +ALIGN 16=0D +=0D +fourGigabytes:=0D +=0D diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetV= ector/Ia32/XenPVHMain.asm new file mode 100644 index 0000000000..2a17fed52f --- /dev/null +++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm @@ -0,0 +1,49 @@ +;-------------------------------------------------------------------------= -----=0D +; @file=0D +; An entry point use by Xen when a guest is started in PVH mode.=0D +;=0D +; Copyright (c) 2019, Citrix Systems, Inc.=0D +;=0D +; SPDX-License-Identifier: BSD-2-Clause-Patent=0D +;=0D +;-------------------------------------------------------------------------= -----=0D +=0D +BITS 32=0D +=0D +xenPVHMain:=0D + ;=0D + ; 'BP' to indicate boot-strap processor=0D + ;=0D + mov di, 'BP'=0D +=0D + ;=0D + ; ESP will be used as initial value of the EAX register=0D + ; in Main.asm=0D + ;=0D + xor esp, esp=0D +=0D + mov ebx, ADDR_OF(gdtr)=0D + lgdt [ebx]=0D +=0D + mov eax, SEC_DEFAULT_CR0=0D + mov cr0, eax=0D +=0D + jmp LINEAR_CODE_SEL:ADDR_OF(.jmpToNewCodeSeg)=0D +.jmpToNewCodeSeg:=0D +=0D + mov eax, SEC_DEFAULT_CR4=0D + mov cr4, eax=0D +=0D + mov ax, LINEAR_SEL=0D + mov ds, ax=0D + mov es, ax=0D + mov fs, ax=0D + mov gs, ax=0D + mov ss, ax=0D +=0D + ;=0D + ; Jump to the main routine of the pre-SEC code=0D + ; skiping the 16-bit part of the routine and=0D + ; into the 32-bit flat mode part=0D + ;=0D + OneTimeCallRet TransitionFromReal16To32BitFlat=0D diff --git a/OvmfPkg/XenResetVector/XenResetVector.nasmb b/OvmfPkg/XenReset= Vector/XenResetVector.nasmb index 89a4b08bc3..0dbc4f2c1d 100644 --- a/OvmfPkg/XenResetVector/XenResetVector.nasmb +++ b/OvmfPkg/XenResetVector/XenResetVector.nasmb @@ -63,6 +63,7 @@ %include "Ia16/Init16.asm"=0D =0D %include "Main.asm"=0D +%include "Ia32/XenPVHMain.asm"=0D =0D %include "Ia16/ResetVectorVtf0.asm"=0D =0D --=20 Anthony PERARD