From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: citrix.com, ip: , mailfrom: anthony.perard@citrix.com) Received: from esa2.hc3370-68.iphmx.com (esa2.hc3370-68.iphmx.com []) by groups.io with SMTP; Thu, 04 Jul 2019 07:42:41 -0700 Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=anthony.perard@citrix.com; spf=Pass smtp.mailfrom=anthony.perard@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of anthony.perard@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="anthony.perard@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa2.hc3370-68.iphmx.com: domain of anthony.perard@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="anthony.perard@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ~all" Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="anthony.perard@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: jRfP1mX9y3KnZe6AOv4c9pvM5ul2dTn6uEXUhw6kS4M0O7MHWbgJN3ipptXSBmqR/HxAsF+1es 13uaIOciMeVbSfOhHnUGdMTYdZPxNc3GZFVi8KXDV0RfiqxYCEDi3tAavkUZX/hjDlK+WCd6Sb MM/oeDYfrUsl85+x94cFXqKlngN4GPFZzTheSLAXx/93FTkC6hNFKUnLYfVvDi5ZpGxBZEp0DU HKPDZhm8q9gP74R77HNGA37jPZp9ahJLndZaIfZ5QVuLuyAh+9DbjewF8DdQFyy6WBI4Hb+H52 s4A= X-SBRS: 2.7 X-MesageID: 2588789 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,451,1557201600"; d="scan'208";a="2588789" From: "Anthony PERARD" To: CC: , Ard Biesheuvel , Jordan Justen , Laszlo Ersek , Julien Grall , Anthony PERARD Subject: [PATCH v3 08/35] OvmfPkg/XenResetVector: Allow jumpstart from either hvmloader or PVH Date: Thu, 4 Jul 2019 15:42:06 +0100 Message-ID: <20190704144233.27968-9-anthony.perard@citrix.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190704144233.27968-1-anthony.perard@citrix.com> References: <20190704144233.27968-1-anthony.perard@citrix.com> MIME-Version: 1.0 Return-Path: anthony.perard@citrix.com Content-Transfer-Encoding: quoted-printable Content-Type: text/plain This patch allows the ResetVector to be run indenpendently from build time addresses. The goal of the patch is to avoid having to create RAM just below 4G when creating a Xen PVH guest while being compatible with the way hvmloader currently load OVMF, just below 4G. Only the new PVH entry point will do the calculation. The ResetVector will figure out its current running address by creating a temporary stack, make a call and calculate the difference between the build time address and the address at run time. This patch copies and make the necessary modification to some other asm files: - copy of UefiCpuPkg/.../Flat32ToFlat64.asm: Allow Transition32FlatTo64Flat to be run from anywhere in memory - copy of UefiCpuPkg/../SearchForBfvBase.asm: Add a extra parameter to indicate where to start the search for the boot firmware volume. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1689 Signed-off-by: Anthony PERARD Acked-by: Laszlo Ersek --- Notes: v3: - rebased, SPDX - fix commit message .../XenResetVector/Ia16/Real16ToFlat32.asm | 3 + .../XenResetVector/Ia32/Flat32ToFlat64.asm | 68 +++++++++++++++ .../XenResetVector/Ia32/SearchForBfvBase.asm | 87 +++++++++++++++++++ OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm | 43 +++++++-- 4 files changed, 194 insertions(+), 7 deletions(-) create mode 100644 OvmfPkg/XenResetVector/Ia32/Flat32ToFlat64.asm create mode 100644 OvmfPkg/XenResetVector/Ia32/SearchForBfvBase.asm diff --git a/OvmfPkg/XenResetVector/Ia16/Real16ToFlat32.asm b/OvmfPkg/XenRe= setVector/Ia16/Real16ToFlat32.asm index 5c329bfaea..36ea74f7fe 100644 --- a/OvmfPkg/XenResetVector/Ia16/Real16ToFlat32.asm +++ b/OvmfPkg/XenResetVector/Ia16/Real16ToFlat32.asm @@ -54,6 +54,9 @@ jumpTo32BitAndLandHere: mov gs, ax=0D mov ss, ax=0D =0D + ; parameter for Flat32SearchForBfvBase=0D + xor eax, eax ; Start searching from top of 4GB for BfvBase=0D +=0D OneTimeCallRet TransitionFromReal16To32BitFlat=0D =0D ALIGN 2=0D diff --git a/OvmfPkg/XenResetVector/Ia32/Flat32ToFlat64.asm b/OvmfPkg/XenRe= setVector/Ia32/Flat32ToFlat64.asm new file mode 100644 index 0000000000..661a8e7028 --- /dev/null +++ b/OvmfPkg/XenResetVector/Ia32/Flat32ToFlat64.asm @@ -0,0 +1,68 @@ +;-------------------------------------------------------------------------= -----=0D +; @file=0D +; Transition from 32 bit flat protected mode into 64 bit flat protected mo= de=0D +;=0D +; Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
=0D +; Copyright (c) 2019, Citrix Systems, Inc.=0D +;=0D +; SPDX-License-Identifier: BSD-2-Clause-Patent=0D +;=0D +;-------------------------------------------------------------------------= -----=0D +=0D +BITS 32=0D +=0D +;=0D +; Modified: EAX, EBX, ECX, EDX, ESP=0D +;=0D +Transition32FlatTo64Flat:=0D +=0D + OneTimeCall SetCr3ForPageTables64=0D +=0D + mov eax, cr4=0D + bts eax, 5 ; enable PAE=0D + mov cr4, eax=0D +=0D + mov ecx, 0xc0000080=0D + rdmsr=0D + bts eax, 8 ; set LME=0D + wrmsr=0D +=0D + mov eax, cr0=0D + bts eax, 31 ; set PG=0D + mov cr0, eax ; enable paging=0D +=0D + ;=0D + ; backup ESP=0D + ;=0D + mov ebx, esp=0D +=0D + ;=0D + ; recalculate delta=0D + ;=0D + mov esp, PVH_SPACE(16)=0D + call .delta=0D +.delta:=0D + pop edx=0D + sub edx, ADDR_OF(.delta)=0D +=0D + ;=0D + ; push return addr and seg to the stack, then return far=0D + ;=0D + push dword LINEAR_CODE64_SEL=0D + mov eax, ADDR_OF(jumpTo64BitAndLandHere)=0D + add eax, edx ; add delta=0D + push eax=0D + retf=0D +=0D +BITS 64=0D +jumpTo64BitAndLandHere:=0D +=0D + ;=0D + ; restore ESP=0D + ;=0D + mov esp, ebx=0D +=0D + debugShowPostCode POSTCODE_64BIT_MODE=0D +=0D + OneTimeCallRet Transition32FlatTo64Flat=0D +=0D diff --git a/OvmfPkg/XenResetVector/Ia32/SearchForBfvBase.asm b/OvmfPkg/Xen= ResetVector/Ia32/SearchForBfvBase.asm new file mode 100644 index 0000000000..190389c46f --- /dev/null +++ b/OvmfPkg/XenResetVector/Ia32/SearchForBfvBase.asm @@ -0,0 +1,87 @@ +;-------------------------------------------------------------------------= -----=0D +; @file=0D +; Search for the Boot Firmware Volume (BFV) base address=0D +;=0D +; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
=0D +; Copyright (c) 2019, Citrix Systems, Inc.=0D +;=0D +; SPDX-License-Identifier: BSD-2-Clause-Patent=0D +;=0D +;-------------------------------------------------------------------------= -----=0D +=0D +;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \=0D +; { 0x8c8ce578, 0x8a3d, 0x4f1c, { 0x99, 0x35, 0x89, 0x61, 0x85, 0xc3, 0x2= d, 0xd3 } }=0D +%define FFS_GUID_DWORD0 0x8c8ce578=0D +%define FFS_GUID_DWORD1 0x4f1c8a3d=0D +%define FFS_GUID_DWORD2 0x61893599=0D +%define FFS_GUID_DWORD3 0xd32dc385=0D +=0D +BITS 32=0D +=0D +;=0D +; Modified: EAX, EBX, ECX=0D +; Preserved: EDI, ESP=0D +;=0D +; @param[in] EAX Start search from here=0D +; @param[out] EBP Address of Boot Firmware Volume (BFV)=0D +;=0D +Flat32SearchForBfvBase:=0D +=0D + mov ecx, eax=0D +searchingForBfvHeaderLoop:=0D + ;=0D + ; We check for a firmware volume at every 4KB address in the 16MB=0D + ; just below where we started, ECX.=0D + ;=0D + sub eax, 0x1000=0D + mov ebx, ecx=0D + sub ebx, eax=0D + cmp ebx, 0x01000000=0D + ; if ECX-EAX > 16MB; jump notfound=0D + ja searchedForBfvHeaderButNotFound=0D +=0D + ;=0D + ; Check FFS GUID=0D + ;=0D + cmp dword [eax + 0x10], FFS_GUID_DWORD0=0D + jne searchingForBfvHeaderLoop=0D + cmp dword [eax + 0x14], FFS_GUID_DWORD1=0D + jne searchingForBfvHeaderLoop=0D + cmp dword [eax + 0x18], FFS_GUID_DWORD2=0D + jne searchingForBfvHeaderLoop=0D + cmp dword [eax + 0x1c], FFS_GUID_DWORD3=0D + jne searchingForBfvHeaderLoop=0D +=0D + ;=0D + ; Check FV Length=0D + ;=0D + cmp dword [eax + 0x24], 0=0D + jne searchingForBfvHeaderLoop=0D + mov ebx, eax=0D + add ebx, dword [eax + 0x20]=0D + cmp ebx, ecx=0D + jnz searchingForBfvHeaderLoop=0D +=0D + jmp searchedForBfvHeaderAndItWasFound=0D +=0D +searchedForBfvHeaderButNotFound:=0D + ;=0D + ; Hang if the SEC entry point was not found=0D + ;=0D + debugShowPostCode POSTCODE_BFV_NOT_FOUND=0D +=0D + ;=0D + ; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed=0D + ; for debugging purposes.=0D + ;=0D + mov eax, 0xBFBFBFBF=0D + mov ebp, eax=0D + jmp $=0D +=0D +searchedForBfvHeaderAndItWasFound:=0D + mov ebp, eax=0D +=0D + debugShowPostCode POSTCODE_BFV_FOUND=0D +=0D + OneTimeCallRet Flat32SearchForBfvBase=0D +=0D diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetV= ector/Ia32/XenPVHMain.asm index f42df3dba2..2df0f12e18 100644 --- a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm +++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm @@ -16,25 +16,42 @@ xenPVHMain: ;=0D mov di, 'BP'=0D =0D - ;=0D - ; ESP will be used as initial value of the EAX register=0D - ; in Main.asm=0D - ;=0D - xor esp, esp=0D -=0D ;=0D ; Store "Start of day" struct pointer for later use=0D ;=0D mov dword[PVH_SPACE (0)], ebx=0D mov dword[PVH_SPACE (4)], 'XPVH'=0D =0D + ;=0D + ; calculate delta between build-addr and run position=0D + ;=0D + mov esp, PVH_SPACE(16) ; create a temporary stack=0D + call .delta=0D +.delta:=0D + pop edx ; get addr of .delta=0D + sub edx, ADDR_OF(.delta) ; calculate delta=0D +=0D + ;=0D + ; Find address of GDT and gdtr and fix the later=0D + ;=0D mov ebx, ADDR_OF(gdtr)=0D + add ebx, edx ; add delta gdtr=0D + mov eax, ADDR_OF(GDT_BASE)=0D + add eax, edx ; add delta to GDT_BASE=0D + mov dword[ebx + 2], eax ; fix GDT_BASE addr in gdtr=0D lgdt [ebx]=0D =0D mov eax, SEC_DEFAULT_CR0=0D mov cr0, eax=0D =0D - jmp LINEAR_CODE_SEL:ADDR_OF(.jmpToNewCodeSeg)=0D + ;=0D + ; push return addr to the stack, then return far=0D + ;=0D + push dword LINEAR_CODE_SEL ; segment to select=0D + mov eax, ADDR_OF(.jmpToNewCodeSeg) ; return addr=0D + add eax, edx ; add delta to return addr=0D + push eax=0D + retf=0D .jmpToNewCodeSeg:=0D =0D mov eax, SEC_DEFAULT_CR4=0D @@ -47,6 +64,18 @@ xenPVHMain: mov gs, ax=0D mov ss, ax=0D =0D + ;=0D + ; ESP will be used as initial value of the EAX register=0D + ; in Main.asm=0D + ;=0D + xor esp, esp=0D +=0D + ;=0D + ; parameter for Flat32SearchForBfvBase=0D + ;=0D + mov eax, ADDR_OF(fourGigabytes)=0D + add eax, edx ; add delta=0D +=0D ;=0D ; Jump to the main routine of the pre-SEC code=0D ; skiping the 16-bit part of the routine and=0D --=20 Anthony PERARD