From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ray.ni@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Thu, 04 Jul 2019 20:51:33 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jul 2019 20:51:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,453,1557212400"; d="scan'208";a="339735920" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.16]) by orsmga005.jf.intel.com with ESMTP; 04 Jul 2019 20:51:31 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Star Zeng , Michael D Kinney Subject: [PATCH] UefiCpuPkg/CpuFeature: Introduce FirstX to indicate 1st unit in parent scope. Date: Fri, 5 Jul 2019 11:51:04 +0800 Message-Id: <20190705035105.237012-1-ray.ni@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1584 The flow of CPU feature initialization logic is: 1. BSP calls GetConfigDataFunc() for each thread/AP; 2. Each thread/AP calls SupportFunc() to detect its own capability; 3. BSP calls InitializeFunc() for each thead/AP. There is a design gap in step #3. For a package scope feature that only requires one thread of each package does the initialization operation, what InitializeFunc() currently does is to do the initialization operation only CPU physical location Core# is 0. But in certain platform, Core#0 might be disabled in hardware level which results the certain package scope feature isn't initialized at all. The patch adds a new field FistX to indicate the CPU's location in its parent scope. FirstX.Package is set for all APs/threads under first package; FirstX.Core is set for all APs/threads under first core of each package; FirstX.Thread is set for the AP/thread of each core. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Star Zeng Cc: Michael D Kinney --- .../Include/Library/RegisterCpuFeaturesLib.h | 19 +++++ .../CpuFeaturesInitialize.c | 74 +++++++++++++++++++ 2 files changed, 93 insertions(+) diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h index 6f964027be..7c1e122ed7 100644 --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h @@ -78,6 +78,20 @@ #define CPU_FEATURE_END MAX_UINT32 /// @} +/// +/// The bit field to indicate whether the CPU is the first in its parent scope. +/// +typedef struct { + UINT32 Thread : 1; + UINT32 Core : 1; + UINT32 Module : 1; + UINT32 Tile : 1; + UINT32 Die : 1; + UINT32 Package : 1; + UINT32 Reserved : 26; +} REGISTER_CPU_FEATURE_FIRST_X; + + /// /// CPU Information passed into the SupportFunc and InitializeFunc of the /// RegisterCpuFeature() library function. This structure contains information @@ -88,6 +102,11 @@ typedef struct { /// The package that the CPU resides /// EFI_PROCESSOR_INFORMATION ProcessorInfo; + + /// + /// The bit flag indicating whether the CPU is the first Thread/Core/Module/Tile/Die/Package in its parent scope. + /// + REGISTER_CPU_FEATURE_FIRST_X FirstX; /// /// The Display Family of the CPU computed from CPUID leaf CPUID_VERSION_INFO /// diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c index aff7ad600c..c7858bc3a8 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c @@ -110,6 +110,9 @@ CpuInitDataInitialize ( EFI_CPU_PHYSICAL_LOCATION *Location; BOOLEAN *CoresVisited; UINTN Index; + UINT32 PackageIndex; + UINT32 CoreIndex; + UINT32 FirstIndex; ACPI_CPU_DATA *AcpiCpuData; CPU_STATUS_INFORMATION *CpuStatus; UINT32 *ValidCoreCountPerPackage; @@ -239,6 +242,77 @@ CpuInitDataInitialize ( ASSERT (CpuFeaturesData->CpuFlags.CoreSemaphoreCount != NULL); CpuFeaturesData->CpuFlags.PackageSemaphoreCount = AllocateZeroPool (sizeof (UINT32) * CpuStatus->PackageCount * CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount); ASSERT (CpuFeaturesData->CpuFlags.PackageSemaphoreCount != NULL); + + // + // Initialize CpuFeaturesData->InitOrder[].CpuInfo.FirstX + // + + // + // Set FirstX.Package for each thread belonging to the first package. + // + FirstIndex = MAX_UINT32; + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + FirstIndex = MIN (Location->Package, FirstIndex); + } + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + if (Location->Package == FirstIndex) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Package = 1; + } + } + + // + // Set FirstX.Die/Tile/Module for each thread assuming: + // single Die under each package, single Tile under each Die, single Module under each Tile + // + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Die = 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Tile = 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Module = 1; + } + + for (PackageIndex = 0; PackageIndex < CpuStatus->PackageCount; PackageIndex++) { + // + // Set FirstX.Core for each thread belonging to the first core of each package. + // + FirstIndex = MAX_UINT32; + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + if (Location->Package == PackageIndex) { + FirstIndex = MIN (Location->Core, FirstIndex); + } + } + + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + if (Location->Package == PackageIndex && Location->Core == FirstIndex) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Core = 1; + } + } + } + + for (PackageIndex = 0; PackageIndex < CpuStatus->PackageCount; PackageIndex++) { + for (CoreIndex = 0; CoreIndex < CpuStatus->MaxCoreCount; CoreIndex++) { + // + // Set FirstX.Thread for the first thread of each core. + // + FirstIndex = MAX_UINT32; + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + if (Location->Package == PackageIndex && Location->Core == CoreIndex) { + FirstIndex = MIN (Location->Thread, FirstIndex); + } + } + + for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { + Location = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location; + if (Location->Package == PackageIndex && Location->Core == CoreIndex && Location->Thread == FirstIndex) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.FirstX.Thread = 1; + } + } + } + } } /** -- 2.21.0.windows.1