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From: "Gao, Zhichao" <zhichao.gao@intel.com>
To: devel@edk2.groups.io
Cc: Sean Brogan <sean.brogan@microsoft.com>,
	Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Laszlo Ersek <lersek@redhat.com>,
	Liming Gao <liming.gao@intel.com>,
	Michael Turner <Michael.Turner@microsoft.com>,
	Bret Barkelew <Bret.Barkelew@microsoft.com>
Subject: [PATCH V2 2/4] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol
Date: Tue,  9 Jul 2019 16:39:54 +0800	[thread overview]
Message-ID: <20190709083956.13024-3-zhichao.gao@intel.com> (raw)
In-Reply-To: <20190709083956.13024-1-zhichao.gao@intel.com>

From: Sean Brogan <sean.brogan@microsoft.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1400

Implement Cp2 protocol: it has one interface to enable the
interrupt and put cpu to sleep and wait for an interrupt.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Turner <Michael.Turner@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
---
 UefiCpuPkg/CpuDxe/CpuDxe.c                    | 38 +++++++++++++++++++
 UefiCpuPkg/CpuDxe/CpuDxe.h                    | 25 ++++++++++++
 UefiCpuPkg/CpuDxe/CpuDxe.inf                  |  3 ++
 .../CpuDxe/Ia32/EnableInterruptsAndSleep.c    | 24 ++++++++++++
 .../CpuDxe/X64/EnableInterruptsAndSleep.nasm  | 31 +++++++++++++++
 5 files changed, 121 insertions(+)
 create mode 100644 UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c
 create mode 100644 UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 7d7270e10b..2eeffcf426 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -18,6 +18,7 @@
 //
 BOOLEAN                   InterruptState = FALSE;
 EFI_HANDLE                mCpuHandle = NULL;
+EFI_HANDLE                mCpu2Handle = NULL;
 BOOLEAN                   mIsFlushingGCD;
 BOOLEAN                   mIsAllocatingPageTable = FALSE;
 UINT64                    mValidMtrrAddressMask;
@@ -96,6 +97,10 @@ EFI_CPU_ARCH_PROTOCOL  gCpu = {
   4                           // DmaBufferAlignment
 };
 
+EDKII_CPU2_PROTOCOL   gCpu2 = {
+  CpuEnableAndWaitForInterrupt
+};
+
 //
 // CPU Arch Protocol Functions
 //
@@ -499,6 +504,28 @@ CpuSetMemoryAttributes (
   return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttributes, NULL);
 }
 
+//
+// CPU2 Protocol Functions
+//
+/**
+  This function enables CPU interrupts and then waits for an interrupt to arrive.
+
+  @param  This                  The EFI_CPU2_PROTOCOL instance.
+
+  @retval EFI_SUCCESS           Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR      Interrupts could not be enabled on the processor.
+
+**/
+EFI_STATUS
+CpuEnableAndWaitForInterrupt (
+  IN EDKII_CPU2_PROTOCOL              *This
+  )
+{
+  EnableInterruptsAndSleep ();
+
+  return EFI_SUCCESS;
+}
+
 /**
   Initializes the valid bits mask and valid address mask for MTRRs.
 
@@ -1211,6 +1238,17 @@ InitializeCpu (
                   );
   ASSERT_EFI_ERROR (Status);
 
+  //
+  // Install CPU2 Protocol
+  //
+  Status = gBS->InstallMultipleProtocolInterfaces (
+                  &mCpu2Handle,
+                  &gEdkiiCpu2ProtocolGuid,
+                  &gCpu2,
+                  NULL
+                  );
+  ASSERT_EFI_ERROR (Status);
+
   InitializeMpSupport ();
 
   return Status;
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
index b029be430b..c1398830ba 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.h
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
@@ -12,6 +12,7 @@
 #include <PiDxe.h>
 
 #include <Protocol/Cpu.h>
+#include <Protocol/Cpu2.h>
 #include <Protocol/MpService.h>
 #include <Register/Msr.h>
 
@@ -305,6 +306,30 @@ PageFaultExceptionHandler (
   IN EFI_SYSTEM_CONTEXT   SystemContext
   );
 
+/**
+  This function enables CPU interrupts and then waits for an interrupt to arrive.
+
+  @param  This                  The EFI_CPU2_PROTOCOL instance.
+
+  @retval EFI_SUCCESS           Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR      Interrupts could not be enabled on the processor.
+
+**/
+EFI_STATUS
+CpuEnableAndWaitForInterrupt (
+  IN EDKII_CPU2_PROTOCOL              *This
+  );
+
+/**
+  Enables CPU interrupts and then waits for an interrupt to arrive.
+
+**/
+VOID
+EFIAPI
+EnableInterruptsAndSleep (
+  VOID
+  );
+
 extern BOOLEAN mIsAllocatingPageTable;
 extern UINTN   mNumberOfProcessors;
 
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 57381dbc85..334ddb142f 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -54,14 +54,17 @@
 
 [Sources.IA32]
   Ia32/CpuAsm.nasm
+  Ia32/EnableInterruptsAndSleep.c
 
 [Sources.X64]
   X64/CpuAsm.nasm
+  X64/EnableInterruptsAndSleep.nasm
 
 [Protocols]
   gEfiCpuArchProtocolGuid                       ## PRODUCES
   gEfiMpServiceProtocolGuid                     ## PRODUCES
   gEfiSmmBase2ProtocolGuid                      ## SOMETIMES_CONSUMES
+  gEdkiiCpu2ProtocolGuid                        ## PRODUCES
 
 [Guids]
   gIdleLoopEventGuid                            ## CONSUMES           ## Event
diff --git a/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c b/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c
new file mode 100644
index 0000000000..dda76139ab
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c
@@ -0,0 +1,24 @@
+/** @file
+  EnableInterruptsAndSleep function
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+
+/**
+  Enables CPU interrupts and then sleep.
+
+**/
+VOID
+EFIAPI
+EnableInterruptsAndSleep (
+  VOID
+  )
+{
+  _asm {
+    sti
+    hlt
+  }
+}
diff --git a/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm b/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm
new file mode 100644
index 0000000000..2d93ecb4bb
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm
@@ -0,0 +1,31 @@
+;------------------------------------------------------------------------------
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   EnableInterruptsAndSleep.nasm
+;
+; Abstract:
+;
+;   EnableInterruptsAndSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterruptsAndSleep (
+;   VOID
+;   );
+;------------------------------------------------------------------------------
+global ASM_PFX(EnableInterruptsAndSleep)
+ASM_PFX(EnableInterruptsAndSleep):
+    sti
+    hlt
+    ret
-- 
2.21.0.windows.1


  parent reply	other threads:[~2019-07-09  8:40 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-09  8:39 [PATCH V2 0/4] Fix race condition and add event protocol Gao, Zhichao
2019-07-09  8:39 ` [PATCH V2 1/4] MdeModulePkg: Add gEdkiiCpu2ProtocolGuid and header file Gao, Zhichao
2019-07-09  8:39 ` Gao, Zhichao [this message]
2019-07-11  2:22   ` [PATCH V2 2/4] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol Dong, Eric
2019-07-11  2:36     ` Gao, Zhichao
2019-07-11 10:24       ` Laszlo Ersek
2019-07-11 10:48         ` Leif Lindholm
2019-07-09  8:39 ` [PATCH V2 3/4] MdeModulePkg: Add gEdkiiCommonEventProtocolGuid for creating event Gao, Zhichao
2019-07-09  8:39 ` [PATCH V2 4/4] MdeModulePkg/DxeMain: Implement common event protocol Gao, Zhichao
2019-07-09  9:23   ` Wang, Jian J
2019-07-10  0:24     ` Gao, Zhichao
2019-07-10  8:46       ` Wang, Jian J
2019-07-11  0:20         ` Gao, Zhichao
2019-07-11  1:26           ` Wang, Jian J
2019-07-10 12:20 ` [edk2-devel] [PATCH V2 0/4] Fix race condition and add " Laszlo Ersek

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