From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: zhichao.gao@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Tue, 09 Jul 2019 01:40:45 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jul 2019 01:40:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,470,1557212400"; d="scan'208";a="185865597" Received: from fieedk001.ccr.corp.intel.com ([10.239.33.119]) by fmsmga001.fm.intel.com with ESMTP; 09 Jul 2019 01:40:04 -0700 From: "Gao, Zhichao" To: devel@edk2.groups.io Cc: Sean Brogan , Eric Dong , Ray Ni , Laszlo Ersek , Liming Gao , Michael Turner , Bret Barkelew Subject: [PATCH V2 2/4] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol Date: Tue, 9 Jul 2019 16:39:54 +0800 Message-Id: <20190709083956.13024-3-zhichao.gao@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190709083956.13024-1-zhichao.gao@intel.com> References: <20190709083956.13024-1-zhichao.gao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sean Brogan REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1400 Implement Cp2 protocol: it has one interface to enable the interrupt and put cpu to sleep and wait for an interrupt. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Liming Gao Cc: Sean Brogan Cc: Michael Turner Cc: Bret Barkelew Signed-off-by: Zhichao Gao --- UefiCpuPkg/CpuDxe/CpuDxe.c | 38 +++++++++++++++++++ UefiCpuPkg/CpuDxe/CpuDxe.h | 25 ++++++++++++ UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 ++ .../CpuDxe/Ia32/EnableInterruptsAndSleep.c | 24 ++++++++++++ .../CpuDxe/X64/EnableInterruptsAndSleep.nasm | 31 +++++++++++++++ 5 files changed, 121 insertions(+) create mode 100644 UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c create mode 100644 UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 7d7270e10b..2eeffcf426 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -18,6 +18,7 @@ // BOOLEAN InterruptState = FALSE; EFI_HANDLE mCpuHandle = NULL; +EFI_HANDLE mCpu2Handle = NULL; BOOLEAN mIsFlushingGCD; BOOLEAN mIsAllocatingPageTable = FALSE; UINT64 mValidMtrrAddressMask; @@ -96,6 +97,10 @@ EFI_CPU_ARCH_PROTOCOL gCpu = { 4 // DmaBufferAlignment }; +EDKII_CPU2_PROTOCOL gCpu2 = { + CpuEnableAndWaitForInterrupt +}; + // // CPU Arch Protocol Functions // @@ -499,6 +504,28 @@ CpuSetMemoryAttributes ( return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttributes, NULL); } +// +// CPU2 Protocol Functions +// +/** + This function enables CPU interrupts and then waits for an interrupt to arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EDKII_CPU2_PROTOCOL *This + ) +{ + EnableInterruptsAndSleep (); + + return EFI_SUCCESS; +} + /** Initializes the valid bits mask and valid address mask for MTRRs. @@ -1211,6 +1238,17 @@ InitializeCpu ( ); ASSERT_EFI_ERROR (Status); + // + // Install CPU2 Protocol + // + Status = gBS->InstallMultipleProtocolInterfaces ( + &mCpu2Handle, + &gEdkiiCpu2ProtocolGuid, + &gCpu2, + NULL + ); + ASSERT_EFI_ERROR (Status); + InitializeMpSupport (); return Status; diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h index b029be430b..c1398830ba 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.h +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h @@ -12,6 +12,7 @@ #include #include +#include #include #include @@ -305,6 +306,30 @@ PageFaultExceptionHandler ( IN EFI_SYSTEM_CONTEXT SystemContext ); +/** + This function enables CPU interrupts and then waits for an interrupt to arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EDKII_CPU2_PROTOCOL *This + ); + +/** + Enables CPU interrupts and then waits for an interrupt to arrive. + +**/ +VOID +EFIAPI +EnableInterruptsAndSleep ( + VOID + ); + extern BOOLEAN mIsAllocatingPageTable; extern UINTN mNumberOfProcessors; diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 57381dbc85..334ddb142f 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf @@ -54,14 +54,17 @@ [Sources.IA32] Ia32/CpuAsm.nasm + Ia32/EnableInterruptsAndSleep.c [Sources.X64] X64/CpuAsm.nasm + X64/EnableInterruptsAndSleep.nasm [Protocols] gEfiCpuArchProtocolGuid ## PRODUCES gEfiMpServiceProtocolGuid ## PRODUCES gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES + gEdkiiCpu2ProtocolGuid ## PRODUCES [Guids] gIdleLoopEventGuid ## CONSUMES ## Event diff --git a/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c b/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c new file mode 100644 index 0000000000..dda76139ab --- /dev/null +++ b/UefiCpuPkg/CpuDxe/Ia32/EnableInterruptsAndSleep.c @@ -0,0 +1,24 @@ +/** @file + EnableInterruptsAndSleep function + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + + +/** + Enables CPU interrupts and then sleep. + +**/ +VOID +EFIAPI +EnableInterruptsAndSleep ( + VOID + ) +{ + _asm { + sti + hlt + } +} diff --git a/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm b/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm new file mode 100644 index 0000000000..2d93ecb4bb --- /dev/null +++ b/UefiCpuPkg/CpuDxe/X64/EnableInterruptsAndSleep.nasm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------ +; +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; Module Name: +; +; EnableInterruptsAndSleep.nasm +; +; Abstract: +; +; EnableInterruptsAndSleep function +; +; Notes: +; +;------------------------------------------------------------------------------ + + DEFAULT REL + SECTION .text + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; EnableInterruptsAndSleep ( +; VOID +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(EnableInterruptsAndSleep) +ASM_PFX(EnableInterruptsAndSleep): + sti + hlt + ret -- 2.21.0.windows.1