From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: michael.d.kinney@intel.com) Received: from mga02.intel.com (mga02.intel.com []) by groups.io with SMTP; Wed, 10 Jul 2019 12:05:22 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jul 2019 12:05:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,475,1557212400"; d="scan'208";a="171008219" Received: from mdkinney-mobl2.amr.corp.intel.com ([10.241.98.74]) by orsmga006.jf.intel.com with ESMTP; 10 Jul 2019 12:05:21 -0700 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Zailiang Sun , Yi Qian , Gary Lin Subject: [edk2-platforms Patch 22/28] Vlv2TbltDevicePkg: Add GCC IA32 build support Date: Wed, 10 Jul 2019 12:05:10 -0700 Message-Id: <20190710190516.6012-23-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190710190516.6012-1-michael.d.kinney@intel.com> References: <20190710190516.6012-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit * Remove CpuIa32Lib that contains inline assembly that is not compatible with GCC builds. Use BaseLib functions for CPUID and MSR access and the CPUID and MSR defintions from the UefiCpuPkg. * Add PlatformPkgGccIa32.dsc * Add /IA32 flag to Build_IFWI.sh * Add /IA32 flag to bld_vlv.sh * Remove unused references to gEfiPlatformCpuInfoGuid Cc: Zailiang Sun Cc: Yi Qian Cc: Gary Lin Signed-off-by: Michael D Kinney --- .../AcpiPlatform/AcpiPlatform.c | 1 - .../Intel/Vlv2TbltDevicePkg/Build_IFWI.sh | 4 + .../Include/Guid/PlatformCpuInfo.h | 16 +- .../Include/Library/CpuIA32.h | 345 ------------------ .../Library/CpuIA32Lib/CpuIA32Lib.inf | 41 --- .../Library/CpuIA32Lib/EfiCpuVersion.c | 70 ---- .../Library/CpuIA32Lib/IA32/CpuIA32.S | 223 ----------- .../Library/CpuIA32Lib/IA32/CpuIA32.asm | 206 ----------- .../Library/CpuIA32Lib/IA32/CpuIA32.c | 177 --------- .../Library/CpuIA32Lib/X64/Cpu.S | 207 ----------- .../Library/CpuIA32Lib/X64/Cpu.asm | 222 ----------- .../MonoStatusCode/MonoStatusCode.inf | 1 - .../PlatformInitPei/MemoryCallback.c | 11 +- .../PlatformInitPei/PlatformEarlyInit.h | 4 +- .../PlatformInitPei/PlatformInitPei.inf | 1 - .../PlatformPei/PlatformPei.inf | 1 - ...formPkgIA32.dsc => PlatformPkgGccIA32.dsc} | 28 +- .../Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 - .../Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 - .../Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 - .../PlatformSetupDxe/PlatformSetupDxe.h | 1 - .../PlatformSetupDxe/PlatformSetupDxe.inf | 2 +- .../PlatformSetupDxe/SetupInfoRecords.c | 42 ++- .../Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c | 12 +- .../Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf | 1 + .../SmBiosMiscDxe/MiscOemType0x90Function.c | 37 +- .../SmBiosMiscDxe/MiscOemType0x94Function.c | 10 +- .../MiscProcessorInformationFunction.c | 3 +- .../SmBiosMiscDxe/SmBiosMiscDxe.inf | 1 - Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh | 7 +- 30 files changed, 97 insertions(+), 1580 deletions(-) delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm copy Platform/Intel/Vlv2TbltDevicePkg/{PlatformPkgIA32.dsc => PlatformPkgGccIA32.dsc} (96%) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c index 72edc1bc1e..479ffa61a0 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c @@ -36,7 +36,6 @@ Abstract: #include #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh b/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh index 422e90ca6c..349f0c7ba7 100755 --- a/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh +++ b/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh @@ -63,6 +63,10 @@ for (( i=1; i<=$#; )) Arch=X64 Build_Flags="$Build_Flags /x64" shift + elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/IA32" ]; then + Arch=IA32 + Build_Flags="$Build_Flags /IA32" + shift elif [ "$1" == "/nG" ]; then Stitch_Flags="$Stitch_Flags /nG" shift diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h index f1756662bd..eec167da3a 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h @@ -1,12 +1,9 @@ /*++ - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- + Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent - - - Module Name: PlatformCpuInfo.h @@ -21,7 +18,6 @@ Abstract: #define _PLATFORM_CPU_INFO_GUID_H_ #include "CpuType.h" -#include #define EFI_PLATFORM_CPU_INFO_GUID \ {\ @@ -95,6 +91,14 @@ typedef struct { UINT8 HwCoordinationFeedback; // ECX [0] } EFI_CPU_POWER_MANAGEMENT; // CPUID.6.EAX + +typedef struct { + UINT32 RegEax; + UINT32 RegEbx; + UINT32 RegEcx; + UINT32 RegEdx; +} EFI_CPUID_REGISTER; + // // IMPORTANT: Each CPU feature enabling entry is assumed a tri-state variable. // - Keep the respective feature entry variable as default value (0x00) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h deleted file mode 100644 index 78c78319ce..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h +++ /dev/null @@ -1,345 +0,0 @@ -/*++ - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - - - - -Module Name: - - CpuIA32.h - -Abstract: - ---*/ - -#ifndef _CPU_IA32_H -#define _CPU_IA32_H - -typedef struct { - UINT32 RegEax; - UINT32 RegEbx; - UINT32 RegEcx; - UINT32 RegEdx; -} EFI_CPUID_REGISTER; - -typedef struct { - UINT32 HeaderVersion; - UINT32 UpdateRevision; - UINT32 Date; - UINT32 ProcessorId; - UINT32 Checksum; - UINT32 LoaderRevision; - UINT32 ProcessorFlags; - UINT32 DataSize; - UINT32 TotalSize; - UINT8 Reserved[12]; -} EFI_CPU_MICROCODE_HEADER; - -typedef struct { - UINT32 ExtendedSignatureCount; - UINT32 ExtendedTableChecksum; - UINT8 Reserved[12]; -} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER; - -typedef struct { - UINT32 ProcessorSignature; - UINT32 ProcessorFlag; - UINT32 ProcessorChecksum; -} EFI_CPU_MICROCODE_EXTENDED_TABLE; - -typedef struct { - UINT32 Stepping : 4; - UINT32 Model : 4; - UINT32 Family : 4; - UINT32 Type : 2; - UINT32 Reserved1 : 2; - UINT32 ExtendedModel : 4; - UINT32 ExtendedFamily : 8; - UINT32 Reserved2 : 4; -} EFI_CPU_VERSION; - -#define EFI_CPUID_SIGNATURE 0x0 -#define EFI_CPUID_VERSION_INFO 0x1 -#define EFI_CPUID_CACHE_INFO 0x2 -#define EFI_CPUID_SERIAL_NUMBER 0x3 -#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000 -#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001 -#define EFI_CPUID_BRAND_STRING1 0x80000002 -#define EFI_CPUID_BRAND_STRING2 0x80000003 -#define EFI_CPUID_BRAND_STRING3 0x80000004 - -#define EFI_MSR_IA32_PLATFORM_ID 0x17 -#define EFI_MSR_IA32_APIC_BASE 0x1B -#define EFI_MSR_EBC_HARD_POWERON 0x2A -#define EFI_MSR_EBC_SOFT_POWERON 0x2B -#define BINIT_DRIVER_DISABLE 0x40 -#define INTERNAL_MCERR_DISABLE 0x20 -#define INITIATOR_MCERR_DISABLE 0x10 -#define EFI_MSR_EBC_FREQUENCY_ID 0x2C -#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79 -#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B -#define EFI_MSR_PSB_CLOCK_STATUS 0xCD -#define EFI_APIC_GLOBAL_ENABLE 0x800 -#define EFI_MSR_IA32_MISC_ENABLE 0x1A0 -#define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000 -#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008 -#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004 -#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002 -#define FAST_STRING_ENABLE_BIT 0x00000001 - -#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200 -#define EFI_CACHE_VARIABLE_MTRR_END 0x20F -#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF -#define EFI_CACHE_MTRR_VALID 0x800 -#define EFI_CACHE_FIXED_MTRR_VALID 0x400 -#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000 -#define EFI_MSR_VALID_MASK 0xFFFFFFFFF -#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000 -#define EFI_MSR_VALID_EXTENDED_MASK 0xFFFFFFFFFFFFF - -#define EFI_IA32_MTRR_FIX64K_00000 0x250 -#define EFI_IA32_MTRR_FIX16K_80000 0x258 -#define EFI_IA32_MTRR_FIX16K_A0000 0x259 -#define EFI_IA32_MTRR_FIX4K_C0000 0x268 -#define EFI_IA32_MTRR_FIX4K_C8000 0x269 -#define EFI_IA32_MTRR_FIX4K_D0000 0x26A -#define EFI_IA32_MTRR_FIX4K_D8000 0x26B -#define EFI_IA32_MTRR_FIX4K_E0000 0x26C -#define EFI_IA32_MTRR_FIX4K_E8000 0x26D -#define EFI_IA32_MTRR_FIX4K_F0000 0x26E -#define EFI_IA32_MTRR_FIX4K_F8000 0x26F - -#define EFI_IA32_MCG_CAP 0x179 -#define EFI_IA32_MCG_CTL 0x17B -#define EFI_IA32_MC0_CTL 0x400 -#define EFI_IA32_MC0_STATUS 0x401 - -#define EFI_IA32_PERF_STATUS 0x198 -#define EFI_IA32_PERF_CTL 0x199 - -#define EFI_CACHE_UNCACHEABLE 0 -#define EFI_CACHE_WRITECOMBINING 1 -#define EFI_CACHE_WRITETHROUGH 4 -#define EFI_CACHE_WRITEPROTECTED 5 -#define EFI_CACHE_WRITEBACK 6 - -// -// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number -// -#define EfiMakeCpuVersion(f, m, s) \ - (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s))) - -/** - Halt the Cpu - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiHalt ( - VOID - ); - -/** - Write back and invalidate the Cpu cache - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiWbinvd ( - VOID - ); - -/** - Invalidate the Cpu cache - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiInvd ( - VOID - ); - -/** - Get the Cpu info by execute the CPUID instruction - - @param[in] RegisterInEax The input value to put into register EAX - @param[in] Regs The Output value - - @retval None - -**/ -VOID -EFIAPI -EfiCpuid ( - IN UINT32 RegisterInEax, - OUT EFI_CPUID_REGISTER *Regs - ); - -/** - When RegisterInEax != 4, the functionality is the same as EfiCpuid. - When RegisterInEax == 4, the function return the deterministic cache - parameters by excuting the CPUID instruction. - - @param[in] RegisterInEax The input value to put into register EAX. - @param[in] CacheLevel The deterministic cache level. - @param[in] Regs The Output value. - - @retval None - -**/ -VOID -EFIAPI -EfiCpuidExt ( - IN UINT32 RegisterInEax, - IN UINT32 CacheLevel, - OUT EFI_CPUID_REGISTER *Regs - ); - -/** - Read Cpu MSR - - @param[in] Index The index value to select the register - - @retval Return the read data - -**/ -UINT64 -EFIAPI -EfiReadMsr ( - IN UINT32 Index - ); - -/** - Write Cpu MSR - - @param[in] Index The index value to select the register - @param[in] Value The value to write to the selected register - - @retval None - -**/ -VOID -EFIAPI -EfiWriteMsr ( - IN UINT32 Index, - IN UINT64 Value - ); - -/** - Read Time stamp - - @param[in] None - - @retval Return the read data - -**/ -UINT64 -EFIAPI -EfiReadTsc ( - VOID - ); - -/** - Writing back and invalidate the cache,then diable it - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiDisableCache ( - VOID - ); - -/** - Invalidate the cache,then Enable it - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiEnableCache ( - VOID - ); - -/** - Get Eflags - - @param[in] None - - @retval Return the Eflags value - -**/ -UINT32 -EFIAPI -EfiGetEflags ( - VOID - ); - -/** - Disable Interrupts - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiDisableInterrupts ( - VOID - ); - -/** - Enable Interrupts - - @param[in] None - - @retval None - -**/ -VOID -EFIAPI -EfiEnableInterrupts ( - VOID - ); - -/** - Extract CPU detail version infomation - - @param[in] FamilyId FamilyId, including ExtendedFamilyId - @param[in] Model Model, including ExtendedModel - @param[in] SteppingId SteppingId - @param[in] Processor Processor - -**/ -VOID -EFIAPI -EfiCpuVersion ( - IN UINT16 *FamilyId, OPTIONAL - IN UINT8 *Model, OPTIONAL - IN UINT8 *SteppingId, OPTIONAL - IN UINT8 *Processor OPTIONAL - ); - -#endif diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf deleted file mode 100644 index c9f0a434ac..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf +++ /dev/null @@ -1,41 +0,0 @@ -# -# -# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved -# -# SPDX-License-Identifier: BSD-2-Clause-Patent - -# -# -# -# Module Name: -# -# CpuIA32Lib.inf -# -# Abstract: -# -# Component description file for the Cpu IA32 library. -# -#--*/ - -[defines] - INF_VERSION = 0x00010005 - BASE_NAME = CpuIA32Lib - FILE_GUID = 98546178-64F1-4d2e-814F-6BF963DB7930 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = CpuIA32Lib - PI_SPECIFICATION_VERSION = 0x0001000A - -[Sources] - EfiCpuVersion.c - -[Sources.IA32] - IA32/CpuIA32.c - -[Sources.X64] - X64/Cpu.asm - X64/Cpu.S - -[Packages] - MdePkg/MdePkg.dec - Vlv2TbltDevicePkg/PlatformPkg.dec diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c deleted file mode 100644 index 935f11e871..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c +++ /dev/null @@ -1,70 +0,0 @@ -/** @file - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - - - -Module Name: - - - EfiCpuVersion.c - -Abstract: - - Provide cpu version extract considering extended family & model ID. ---*/ - -#include - -/** - Extract CPU detail version infomation - - @param FamilyId FamilyId, including ExtendedFamilyId - @param Model Model, including ExtendedModel - @param SteppingId SteppingId - @param Processor Processor - -**/ -VOID -EFIAPI -EfiCpuVersion ( - IN OUT UINT16 *FamilyId, OPTIONAL - IN OUT UINT8 *Model, OPTIONAL - IN OUT UINT8 *SteppingId, OPTIONAL - IN OUT UINT8 *Processor OPTIONAL - ) - -{ - EFI_CPUID_REGISTER Register; - UINT8 TempFamilyId; - - EfiCpuid (EFI_CPUID_VERSION_INFO, &Register); - - if (SteppingId != NULL) { - *SteppingId = (UINT8) (Register.RegEax & 0xF); - } - - if (Processor != NULL) { - *Processor = (UINT8) ((Register.RegEax >> 12) & 0x3); - } - - if (Model != NULL || FamilyId != NULL) { - TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF); - - if (Model != NULL) { - *Model = (UINT8) ((Register.RegEax >> 4) & 0xF); - if (TempFamilyId == 0x6 || TempFamilyId == 0xF) { - *Model = (UINT8) (*Model | ((Register.RegEax >> 12) & 0xF0)); - } - } - - if (FamilyId != NULL) { - *FamilyId = TempFamilyId; - if (TempFamilyId == 0xF) { - *FamilyId = (UINT8 ) (*FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF)); - } - } - } -} diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S deleted file mode 100644 index ba1bd448c0..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S +++ /dev/null @@ -1,223 +0,0 @@ -# -# -# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved -# -# SPDX-License-Identifier: BSD-2-Clause-Patent - -# -# -# -#Module Name: -# -# CpuIA32.c -# -#Abstract: -# -#--*/ - -##include "CpuIA32.h" -#include "EfiBind.h" - -#--------------------------------------------------------------------------- - .586p: - #.MODEL flat,C - .code: - -#--------------------------------------------------------------------------- - -.globl ASM_PFX(EfiHalt) -.globl ASM_PFX(EfiWbinvd) -.globl ASM_PFX(EfiInvd) -.globl ASM_PFX(EfiCpuid) -.globl ASM_PFX(EfiReadMsr) -.globl ASM_PFX(EfiWriteMsr) -.globl ASM_PFX(EfiReadTsc) -.globl ASM_PFX(EfiDisableCache) -.globl ASM_PFX(EfiEnableCache) -.globl ASM_PFX(EfiGetEflags) -.globl ASM_PFX(EfiDisableInterrupts) -.globl ASM_PFX(EfiEnableInterrupts) -.globl ASM_PFX(EfiCpuidExt) - - -#VOID -#EfiHalt ( -# VOID -#) -ASM_PFX(EfiHalt): - hlt - ret -#EfiHalt ENDP - -#VOID -#EfiWbinvd ( -# VOID -#) -ASM_PFX(EfiWbinvd): - wbinvd - ret -#EfiWbinvd ENDP - -#VOID -#EfiInvd ( -# VOID -#) -ASM_PFX(EfiInvd): - invd - ret -#EfiInvd ENDP - -#VOID -#EfiCpuid (IN UINT32 RegisterInEax, -# OUT EFI_CPUID_REGISTER *Reg OPTIONAL) -ASM_PFX(EfiCpuid): - pushl %ebp - movl %esp, %ebp - pushl %ebx - pushl %esi - pushl %edi - pushal - - movl 8(%ebp), %eax #RegisterInEax - cpuid - cmpl $0, 0xC(%ebp) # Reg - je L1 - movl 0xC(%ebp), %edi # Reg - - movl %eax, (%edi) # Reg->RegEax - movl %ebx, 4(%edi) # Reg->RegEbx - movl %ecx, 8(%edi) # Reg->RegEcx - movl %edx, 0xC(%edi) # Reg->RegEdx - -L1: - popal - popl %edi - popl %esi - popl %ebx - popl %ebp - - ret -#EfiCpuid ENDP - - -#UINT64 -#EfiReadMsr ( -# IN UINT32 Index -# ); -ASM_PFX(EfiReadMsr): - movl 4(%esp), %ecx # Index - rdmsr - ret -#EfiReadMsr ENDP - -#VOID -#EfiWriteMsr ( -# IN UINT32 Index, -# IN UINT64 Value -# ); -ASM_PFX(EfiWriteMsr): - movl 4(%esp), %ecx # Index - movl 8(%esp), %eax # DWORD PTR Value[0] - movl 0xC(%esp), %edx # DWORD PTR Value[4] - wrmsr - ret -#EfiWriteMsr ENDP - -#UINT64 -#EfiReadTsc ( -# VOID -# ) -ASM_PFX(EfiReadTsc): - rdtsc - ret -#EfiReadTsc ENDP - -#VOID -#EfiDisableCache ( -# VOID -#) -ASM_PFX(EfiDisableCache): - movl %cr0, %eax - bswapl %eax - andb $0x60, %al - cmpb $0x60, %al - je L2 - movl %cr0, %eax - orl $0x60000000, %eax - movl %eax, %cr0 - wbinvd -L2: - ret -#EfiDisableCache ENDP - -#VOID -#EfiEnableCache ( -# VOID -# ) -ASM_PFX(EfiEnableCache): - wbinvd - movl %cr0, %eax - andl $0x9fffffff, %eax - movl %eax, %cr0 - ret -#EfiEnableCache ENDP - -#UINT32 -#EfiGetEflags ( -# VOID -# ) -ASM_PFX(EfiGetEflags): - pushfl - popl %eax - ret -#EfiGetEflags ENDP - -#VOID -#EfiDisableInterrupts ( -# VOID -# ) -ASM_PFX(EfiDisableInterrupts): - cli - ret -#EfiDisableInterrupts ENDP - -#VOID -#EfiEnableInterrupts ( -# VOID -# ) -ASM_PFX(EfiEnableInterrupts): - sti - ret -#EfiEnableInterrupts ENDP - -#VOID -#EfiCpuidExt ( -# IN UINT32 RegisterInEax, -# IN UINT32 CacheLevel, -# OUT EFI_CPUID_REGISTER *Regs -# ) -ASM_PFX(EfiCpuidExt): - push %ebx - push %edi - push %esi - pushal - - movl 0x30(%esp), %eax # RegisterInEax - movl 0x34(%esp), %ecx # CacheLevel - cpuid - movl 0x38(%esp), %edi # DWORD PTR Regs - - movl %eax, (%edi) # Reg->RegEax - movl %ebx, 4(%edi) # Reg->RegEbx - movl %ecx, 8(%edi) # Reg->RegEcx - movl %edx, 0xC(%edi) # Reg->RegEdx - - popal - pop %esi - pop %edi - pop %ebx - ret -#EfiCpuidExt ENDP - - - diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm deleted file mode 100644 index 3fdf16f8ee..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm +++ /dev/null @@ -1,206 +0,0 @@ -; -; This file contains an 'Intel Sample Driver' and is -; licensed for Intel CPUs and chipsets under the terms of your -; license agreement with Intel or your vendor. This file may -; be modified by the user, subject to additional terms of the -; license agreement -; -; -; Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved -; -; SPDX-License-Identifier: BSD-2-Clause-Patent - -; -; - -;Module Name: -; -; CpuIA32.c -; -;Abstract: -; -;--*/ - -;#include "CpuIA32.h" - -;--------------------------------------------------------------------------- - .586p - .model flat,C - .code - -;--------------------------------------------------------------------------- -;VOID -;EfiHalt ( -; VOID -;) -EfiHalt PROC C PUBLIC - hlt - ret -EfiHalt ENDP - -;VOID -;EfiWbinvd ( -; VOID -;) -EfiWbinvd PROC C PUBLIC - wbinvd - ret -EfiWbinvd ENDP - -;VOID -;EfiInvd ( -; VOID -;) -EfiInvd PROC C PUBLIC - invd - ret -EfiInvd ENDP - -;VOID -;EfiCpuid (IN UINT32 RegisterInEax, -; OUT EFI_CPUID_REGISTER *Reg OPTIONAL) -EfiCpuid PROC C PUBLIC - push ebp - mov ebp, esp - push ebx - push esi - push edi - pushad - - mov eax, dword ptr[ebp + 8] ;egisterInEax - cpuid - cmp dword ptr[ebp + 0Ch], 0 ; Reg - je @F - mov edi,dword ptr [ebp+0Ch] ; Reg - - mov dword ptr [edi],eax ; Reg->RegEax - mov dword ptr [edi+4],ebx ; Reg->RegEbx - mov dword ptr [edi+8],ecx ; Reg->RegEcx - mov dword ptr [edi+0Ch],edx ; Reg->RegEdx - -@@: - popad - pop edi - pop esi - pop ebx - pop ebp - - ret -EfiCpuid ENDP - - -;UINT64 -;EfiReadMsr ( -; IN UINT32 Index -; ); -EfiReadMsr PROC C PUBLIC - mov ecx, dword ptr [esp + 4]; Index - rdmsr - ret -EfiReadMsr ENDP - -;VOID -;EfiWriteMsr ( -; IN UINT32 Index, -; IN UINT64 Value -; ); -EfiWriteMsr PROC C PUBLIC - mov ecx, dword ptr [esp+4]; Index - mov eax, dword ptr [esp+8]; DWORD PTR Value[0] - mov edx, dword ptr [esp+0Ch]; DWORD PTR Value[4] - wrmsr - ret -EfiWriteMsr ENDP - -;UINT64 -;EfiReadTsc ( -; VOID -; ) -EfiReadTsc PROC C PUBLIC - rdtsc - ret -EfiReadTsc ENDP - -;VOID -;EfiDisableCache ( -; VOID -;) -EfiDisableCache PROC C PUBLIC - mov eax, cr0 - bswap eax - and al, 60h - cmp al, 60h - je @F - mov eax, cr0 - or eax, 060000000h - mov cr0, eax - wbinvd -@@: - ret -EfiDisableCache ENDP - -;VOID -;EfiEnableCache ( -; VOID -; ) -EfiEnableCache PROC C PUBLIC - wbinvd - mov eax, cr0 - and eax, 09fffffffh - mov cr0, eax - ret -EfiEnableCache ENDP - -;UINT32 -;EfiGetEflags ( -; VOID -; ) -EfiGetEflags PROC C PUBLIC - pushfd - pop eax - ret -EfiGetEflags ENDP - -;VOID -;EfiDisableInterrupts ( -; VOID -; ) -EfiDisableInterrupts PROC C PUBLIC - cli - ret -EfiDisableInterrupts ENDP - -;VOID -;EfiEnableInterrupts ( -; VOID -; ) -EfiEnableInterrupts PROC C PUBLIC - sti - ret -EfiEnableInterrupts ENDP - -;VOID -;EfiCpuidExt ( -; IN UINT32 RegisterInEax, -; IN UINT32 CacheLevel, -; OUT EFI_CPUID_REGISTER *Regs -; ) -EfiCpuidExt PROC C PUBLIC USES ebx edi esi - pushad - - mov eax, dword ptr [esp + 30h] ; RegisterInEax - mov ecx, dword ptr [esp + 34h] ; CacheLevel - cpuid - mov edi, dword ptr [esp + 38h] ; DWORD PTR Regs - - mov dword ptr [edi], eax ; Reg->RegEax - mov dword ptr [edi + 4], ebx ; Reg->RegEbx - mov dword ptr [edi + 8], ecx ; Reg->RegEcx - mov dword ptr [edi + 0Ch], edx ; Reg->RegEdx - - popad - ret -EfiCpuidExt ENDP - - END - diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c deleted file mode 100644 index cb8de2f9c7..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c +++ /dev/null @@ -1,177 +0,0 @@ -/** @file - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - - - -Module Name: - - - CpuIA32.c - -Abstract: - ---*/ - -#include - -VOID -EfiHalt (VOID) -{ - __asm { - hlt - } -} - -VOID -EfiWbinvd (VOID) -{ - __asm { - wbinvd - } -} - -VOID -EfiInvd (VOID) -{ - __asm { - invd - } -} - -VOID -EfiCpuid (IN UINT32 RegisterInEax, - OUT EFI_CPUID_REGISTER *Reg OPTIONAL) -{ - __asm { - pushad - - mov eax, RegisterInEax - cpuid - cmp Reg, 0 - je _Exit - mov edi, DWORD PTR Reg - - mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax - mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx - mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx - mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx - -_Exit: - popad - } -} - -UINT64 -EfiReadMsr (IN UINT32 Index) -{ - __asm { - mov ecx, Index - rdmsr - } -} - -VOID -EfiWriteMsr ( - IN UINT32 Index, - IN UINT64 Value - ) -{ - __asm { - mov ecx, Index - mov eax, DWORD PTR Value[0] - mov edx, DWORD PTR Value[4] - wrmsr - } -} - -UINT64 -EfiReadTsc (VOID) -{ - __asm { - rdtsc - } -} - -VOID -EfiDisableCache (VOID) -{ - __asm { - mov eax, cr0 - bswap eax - and al, 60h - cmp al, 60h - je Exit - mov eax, cr0 - or eax, 060000000h - mov cr0, eax - wbinvd -Exit: - } -} - -VOID -EfiEnableCache (VOID) -{ - __asm { - wbinvd - mov eax, cr0 - and eax, 09fffffffh - mov cr0, eax - } -} - -UINT32 -EfiGetEflags ( - VOID - ) -{ - __asm { - pushfd - pop eax - } -} - -VOID -EfiDisableInterrupts (VOID) -{ - __asm { - cli - } -} - -VOID -EfiEnableInterrupts ( - VOID - ) -{ - __asm { - sti - } -} - -VOID -EfiCpuidExt ( - IN UINT32 RegisterInEax, - IN UINT32 CacheLevel, - OUT EFI_CPUID_REGISTER *Regs - ) -{ - __asm { - pushad - - mov eax, RegisterInEax - mov ecx, CacheLevel - cpuid - mov edi, DWORD PTR Regs - - mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax - mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx - mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx - mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx - - popad - } -} diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S deleted file mode 100644 index 3a8d6e6bc5..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S +++ /dev/null @@ -1,207 +0,0 @@ -# -# -# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved -# -# SPDX-License-Identifier: BSD-2-Clause-Patent - -# -# -# -#* Module Name: -#* -#* Cpu.asm -#* -#* Abstract: -#* -#------------------------------------------------------------------------------ -##include - -.globl ASM_PFX(EfiHalt) -.globl ASM_PFX(EfiWbinvd) -.globl ASM_PFX(EfiInvd) -.globl ASM_PFX(EfiCpuid) -.globl ASM_PFX(EfiReadTsc) -.globl ASM_PFX(EfiDisableCache) -.globl ASM_PFX(EfiEnableCache) -.globl ASM_PFX(EfiReadMsr) -.globl ASM_PFX(EfiWriteMsr) -.globl ASM_PFX(EfiGetEflags) -.globl ASM_PFX(EfiDisableInterrupts) -.globl ASM_PFX(EfiEnableInterrupts) -.globl ASM_PFX(EfiCpuidExt) - -.text - - -#------------------------------------------------------------------------------ -# VOID -# EfiHalt ( -# VOID -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiHalt): - hlt - retq - - -#------------------------------------------------------------------------------ -# VOID -# EfiWbinvd ( -# VOID -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiWbinvd): - wbinvd - retq - - -#------------------------------------------------------------------------------ -# VOID -# EfiInvd ( -# VOID -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiInvd): - invd - retq - -#------------------------------------------------------------------------------ -# VOID -# EfiCpuid ( -# IN UINT32 RegisterInEax, // rcx -# OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiCpuid): - push %rbx - mov %rdx,%r8 - mov %rcx,%rax - cpuid - cmp $0x0,%r8 - je _Exit - mov %eax,(%r8) - mov %ebx,0x4(%r8) - mov %ecx,0x8(%r8) - mov %edx,0xc(%r8) -_Exit: - pop %rbx - retq - -#------------------------------------------------------------------------------ -# UINT64 -# EfiReadMsr ( -# IN UINT32 Index, // rcx -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiReadMsr): - rdmsr - shl $0x20,%rdx - or %rdx,%rax - retq - -#------------------------------------------------------------------------------ -# VOID -# EfiWriteMsr ( -# IN UINT32 Index, // rcx -# IN UINT64 Value // rdx -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiWriteMsr): - mov %rdx,%rax - sar $0x20,%rdx - wrmsr - retq - -#------------------------------------------------------------------------------ -# UINT64 -# EfiReadTsc ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiReadTsc): - rdtsc - shl $0x20,%rax - shrd $0x20,%rdx,%rax - retq - -#------------------------------------------------------------------------------ -# VOID -# EfiDisableCache ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiDisableCache): -# added a check to see if cache is already disabled. If it is, then skip. - mov %cr0,%rax - and $0x60000000,%rax - cmp $0x0,%rax - jne 1f - mov %cr0,%rax - or $0x60000000,%rax - mov %rax,%cr0 - wbinvd -1: - retq - -#------------------------------------------------------------------------------ -# VOID -# EfiEnableCache ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiEnableCache): - wbinvd - mov %cr0,%rax - and $0xffffffff9fffffff,%rax - mov %rax,%cr0 - retq - -#------------------------------------------------------------------------------ -# UINTN -# EfiGetEflags ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiGetEflags): - pushfq - pop %rax - retq - -#------------------------------------------------------------------------------ -# VOID -# EfiDisableInterrupts ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiDisableInterrupts): - cli - ret - -#------------------------------------------------------------------------------ -# VOID -# EfiEnableInterrupts ( -# VOID -# ); -#------------------------------------------------------------------------------ -ASM_PFX(EfiEnableInterrupts): - sti - ret -#------------------------------------------------------------------------------ -# VOID -# EfiCpuidExt ( -# IN UINT32 RegisterInEax, -# IN UINT32 CacheLevel, -# OUT EFI_CPUID_REGISTER *Regs -# ) -#------------------------------------------------------------------------------ -ASM_PFX(EfiCpuidExt): - push %rbx - mov %rcx,%rax - mov %rdx,%rcx - cpuid - mov %eax,(%r8) - mov %ebx,0x4(%r8) - mov %ecx,0x8(%r8) - mov %edx,0xc(%r8) - pop %rbx - retq diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm deleted file mode 100644 index 44aae7de64..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm +++ /dev/null @@ -1,222 +0,0 @@ - -TITLE Cpu.asm: Assembly code for the x64 resources - -; -; This file contains an 'Intel Sample Driver' and is -; licensed for Intel CPUs and chipsets under the terms of your -; license agreement with Intel or your vendor. This file may -; be modified by the user, subject to additional terms of the -; license agreement -; -; -; Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved -; -; SPDX-License-Identifier: BSD-2-Clause-Patent - -; -; -; -; -; -;* Module Name: -;* -;* Cpu.asm -;* -;* Abstract: -;* -;------------------------------------------------------------------------------ - -text SEGMENT - - -;------------------------------------------------------------------------------ -; VOID -; EfiHalt ( -; VOID -; ) -;------------------------------------------------------------------------------ -EfiHalt PROC PUBLIC - hlt - ret -EfiHalt ENDP - - -;------------------------------------------------------------------------------ -; VOID -; EfiWbinvd ( -; VOID -; ) -;------------------------------------------------------------------------------ -EfiWbinvd PROC PUBLIC - wbinvd - ret -EfiWbinvd ENDP - - -;------------------------------------------------------------------------------ -; VOID -; EfiInvd ( -; VOID -; ) -;------------------------------------------------------------------------------ -EfiInvd PROC PUBLIC - invd - ret -EfiInvd ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiCpuid ( -; IN UINT32 RegisterInEax, // rcx -; OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx -; ) -;------------------------------------------------------------------------------ -EfiCpuid PROC PUBLIC - push rbx - - mov r8, rdx ; r8 = *Reg - mov rax, rcx ; RegisterInEax - cpuid - cmp r8, 0 - je _Exit - mov [r8 + 0], eax ; Reg->RegEax - mov [r8 + 4], ebx ; Reg->RegEbx - mov [r8 + 8], ecx ; Reg->RegEcx - mov [r8 + 12], edx ; Reg->RegEdx - -_Exit: - pop rbx - ret -EfiCpuid ENDP - -;------------------------------------------------------------------------------ -; UINT64 -; EfiReadMsr ( -; IN UINT32 Index, // rcx -; ) -;------------------------------------------------------------------------------ -EfiReadMsr PROC PUBLIC - rdmsr - sal rdx, 32 ; edx:eax -> rax - or rax, rdx ; rax = edx:eax - ret -EfiReadMsr ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiWriteMsr ( -; IN UINT32 Index, // rcx -; IN UINT64 Value // rdx -; ) -;------------------------------------------------------------------------------ -EfiWriteMsr PROC PUBLIC - mov rax, rdx ; rdx = Value - sar rdx, 32 ; convert rdx to edx upper 32-bits - wrmsr ; wrmsr[ecx] result = edx:eax - ret -EfiWriteMsr ENDP - - -;------------------------------------------------------------------------------ -; UINT64 -; EfiReadTsc ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiReadTsc PROC PUBLIC - rdtsc - shl rax, 32 - shrd rax, rdx, 32 - ret -EfiReadTsc ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiDisableCache ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiDisableCache PROC PUBLIC -; added a check to see if cache is already disabled. If it is, then skip. - mov rax, cr0 - and rax, 060000000h - cmp rax, 0 - jne @f - mov rax, cr0 - or rax, 060000000h - mov cr0, rax - wbinvd -@@: - ret -EfiDisableCache ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiEnableCache ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiEnableCache PROC PUBLIC - wbinvd - mov rax, cr0 - and rax, 09fffffffh - mov cr0, rax - ret -EfiEnableCache ENDP - -;------------------------------------------------------------------------------ -; UINTN -; EfiGetEflags ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiGetEflags PROC PUBLIC - pushfq - pop rax - ret -EfiGetEflags ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiDisableInterrupts ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiDisableInterrupts PROC PUBLIC - cli - ret -EfiDisableInterrupts ENDP - -;------------------------------------------------------------------------------ -; VOID -; EfiEnableInterrupts ( -; VOID -; ); -;------------------------------------------------------------------------------ -EfiEnableInterrupts PROC PUBLIC - sti - ret -EfiEnableInterrupts ENDP -;------------------------------------------------------------------------------ -; VOID -; EfiCpuidExt ( -; IN UINT32 RegisterInEax, -; IN UINT32 CacheLevel, -; OUT EFI_CPUID_REGISTER *Regs -; ) -;------------------------------------------------------------------------------ -EfiCpuidExt PROC PUBLIC - push rbx - mov rax, rcx ; rax = RegisterInEax - mov rcx, rdx ; rcx = CacheLevel - - cpuid - mov [r8 + 0 ], eax ; Reg->RegEax - mov [r8 + 4 ], ebx ; Reg->RegEbx - mov [r8 + 8 ], ecx ; Reg->RegEcx - mov [r8 + 12], edx ; Reg->RegEdx - - pop rbx - ret -EfiCpuidExt ENDP -END diff --git a/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf b/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf index c5e3cf4d55..f1e8c7f639 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf @@ -58,7 +58,6 @@ [Pcd] gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam [Guids] - gEfiPlatformCpuInfoGuid gEfiStatusCodeDataTypeStringGuid ## CONSUMES [Depex] diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c index 074bf7debb..61ecc52cb5 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c @@ -124,7 +124,8 @@ MemoryDiscoveredPpiNotifyCallback ( { EFI_STATUS Status; EFI_BOOT_MODE BootMode; - EFI_CPUID_REGISTER FeatureInfo; + UINT32 MaximumExtendedFunction; + CPUID_VIR_PHY_ADDRESS_SIZE_EAX Eax; UINT8 CpuAddressWidth; UINT16 Pm1Cnt; EFI_PEI_HOB_POINTERS Hob; @@ -279,10 +280,10 @@ MemoryDiscoveredPpiNotifyCallback ( // Create a CPU hand-off information // CpuAddressWidth = 32; - AsmCpuid (EFI_CPUID_EXTENDED_FUNCTION, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx); - if (FeatureInfo.RegEax >= EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE) { - AsmCpuid (EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx); - CpuAddressWidth = (UINT8) (FeatureInfo.RegEax & 0xFF); + AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaximumExtendedFunction, NULL, NULL, NULL); + if (MaximumExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) { + AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Eax.Uint32, NULL, NULL, NULL); + CpuAddressWidth = (UINT8) (Eax.Bits.PhysicalAddressBits); } BuildCpuHob(CpuAddressWidth, 16); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h index 6a2ecf8fb4..8c02adba64 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h @@ -53,7 +53,7 @@ Abstract: #include #include #include -#include +#include #include #include @@ -95,8 +95,6 @@ Abstract: #define SMBIOS_WAKEUP_TYPE_PCI_PME 0x07 #define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED 0x08 -#define EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE 0x80000008 - // // Defines for stall ppi // diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf index eeb9a4a023..8350cf47b7 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf @@ -78,7 +78,6 @@ [Guids] gEfiSetupVariableGuid gEfiPlatformInfoGuid gEfiPlatformBootModeGuid - gEfiPlatformCpuInfoGuid gEfiGlobalVariableGuid gRecoveryOnFatFloppyDiskGuid gRecoveryOnFatUsbDiskGuid diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf index d3969f2344..aac93b0b90 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf @@ -100,7 +100,6 @@ [Guids] gEfiSetupVariableGuid gEfiPlatformInfoGuid gEfiPlatformBootModeGuid - gEfiPlatformCpuInfoGuid gEfiGlobalVariableGuid gRecoveryOnFatFloppyDiskGuid gRecoveryOnFatUsbDiskGuid diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc similarity index 96% copy from Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc copy to Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc index dc6d8b1b26..7993ee5758 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc @@ -42,7 +42,7 @@ [Defines] DEFINE DXE_ARCHITECTURE = IA32 !endif - FLASH_DEFINITION = Vlv2TbltDevicePkg/PlatformPkg.fdf + FLASH_DEFINITION = Vlv2TbltDevicePkg/PlatformPkgGcc.fdf !if $(LFMA_ENABLE) == TRUE FIX_LOAD_TOP_MEMORY_ADDRESS = 0xFFFFFFFFFFFFFFFF DEFINE TOP_MEMORY_ADDRESS = 0xFFFFFFFFFFFFFFFF @@ -220,7 +220,6 @@ [LibraryClasses.common] !endif BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf - CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf @@ -770,7 +769,7 @@ [Components.IA32] !if $(RC_BINARY_RELEASE) == TRUE Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf { - *_*_IA32_CC_FLAGS = /DRC_BINARY_RELEASE + *_*_IA32_CC_FLAGS = -DRC_BINARY_RELEASE !if $(TARGET) == DEBUG gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E @@ -1245,14 +1244,14 @@ [BuildOptions] DEFINE MINNOW2_FSP_OPTION = !if $(ENBDT_PF_BUILD) == TRUE - DEFINE ENBDT_PF_ENABLE = /DENBDT_PF_ENABLE=1 + DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=1 !else - DEFINE ENBDT_PF_ENABLE = /DENBDT_PF_ENABLE=0 + DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=0 !endif !if $(CLKGEN_CONFIG_EXTRA_ENABLE) == TRUE - DEFINE CLKGEN_CONFIG_EXTRA_BUILD_OPTION = /DCLKGEN_CONFIG_EXTRA=1 + DEFINE CLKGEN_CONFIG_EXTRA_BUILD_OPTION = -DCLKGEN_CONFIG_EXTRA=1 !else DEFINE CLKGEN_CONFIG_EXTRA_BUILD_OPTION = !endif @@ -1260,29 +1259,29 @@ [BuildOptions] !if $(PCIESC_ENABLE) == TRUE - DEFINE PCIESC_SUPPORT_BUILD_OPTION = /DPCIESC_SUPPORT=1 + DEFINE PCIESC_SUPPORT_BUILD_OPTION = -DPCIESC_SUPPORT=1 !else DEFINE PCIESC_SUPPORT_BUILD_OPTION = !endif !if $(SATA_ENABLE) == TRUE - DEFINE SATA_SUPPORT_BUILD_OPTION = /DSATA_SUPPORT=1 + DEFINE SATA_SUPPORT_BUILD_OPTION = -DSATA_SUPPORT=1 !else DEFINE SATA_SUPPORT_BUILD_OPTION = !endif !if $(ENBDT_S3_SUPPORT) == TRUE - DEFINE ENBDT_S3_SUPPORT_OPTIONS = /DNOCS_S3_SUPPORT + DEFINE ENBDT_S3_SUPPORT_OPTIONS = -DNOCS_S3_SUPPORT !else DEFINE ENBDT_S3_SUPPORT_OPTIONS = !endif !if $(X64_CONFIG) == TRUE - DEFINE X64_BUILD_ENABLE = /DX64_BUILD_ENABLE=1 + DEFINE X64_BUILD_ENABLE = -DX64_BUILD_ENABLE=1 !else DEFINE X64_BUILD_ENABLE = !endif !if $(TPM_ENABLED) == TRUE - DEFINE DSC_TPM_BUILD_OPTIONS = /DTPM_ENABLED + DEFINE DSC_TPM_BUILD_OPTIONS = -DTPM_ENABLED !else DEFINE DSC_TPM_BUILD_OPTIONS = !endif @@ -1293,13 +1292,12 @@ [BuildOptions] DEFINE PDB_BUILD_OPTION = /Zi !endif + GCC:*_*_*_CC_FLAGS = -Wno-missing-braces !if $(SOURCE_DEBUG_ENABLE) == TRUE MSFT:*_*_X64_GENFW_FLAGS = --keepexceptiontable GCC:*_*_X64_GENFW_FLAGS = --keepexceptiontable INTEL:*_*_X64_GENFW_FLAGS = --keepexceptiontable -!if $(TARGET) == DEBUG - DEFINE SOURCE_LEVEL_DEBUG_BUILD_OPTIONS = /Od /Oy- -!endif + DEFINE SOURCE_LEVEL_DEBUG_BUILD_OPTIONS = !else DEFINE SOURCE_LEVEL_DEBUG_BUILD_OPTIONS = @@ -1322,7 +1320,7 @@ [BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE] GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 [BuildOptions.Common.EDKII] - *_*_IA32_ASM_FLAGS = $(VP_BUILD_OPTIONS) /D EDKII_GLUE_PciExpressBaseAddress=$(PLATFORM_PCIEXPRESS_BASE)h /DNOCS_S3_SUPPORT + *_*_IA32_ASM_FLAGS = $(VP_BUILD_OPTIONS) -D EDKII_GLUE_PciExpressBaseAddress=$(PLATFORM_PCIEXPRESS_BASE)h -DNOCS_S3_SUPPORT *_*_IA32_CC_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) *_*_IA32_VFRPP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index 26c1caad94..ee0d055d64 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -222,7 +222,6 @@ [LibraryClasses.common] !endif BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf - CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index dc6d8b1b26..62ca4f67cc 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -220,7 +220,6 @@ [LibraryClasses.common] !endif BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf - CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index cbc87aa9be..282ff3c2e2 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -222,7 +222,6 @@ [LibraryClasses.common] !endif BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf - CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h index b4a30511ac..1876977e4d 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h @@ -41,7 +41,6 @@ #include #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf index 8ff246041d..ce92b9241a 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf @@ -61,6 +61,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec SecurityPkg/SecurityPkg.dec + UefiCpuPkg/UefiCpuPkg.dec BoardModulePkg/BoardModulePkg.dec Vlv2TbltDevicePkg/PlatformPkg.dec Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec #for PchAccess.h @@ -79,7 +80,6 @@ [LibraryClasses] UefiRuntimeServicesTableLib PrintLib BiosIdLib - CpuIA32Lib IoLib HobLib diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c index be99356d0f..1770d0de42 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c @@ -27,6 +27,8 @@ Revision History: #include #include #include +#include +#include #include "Valleyview.h" #include "VlvAccess.h" @@ -74,7 +76,6 @@ SB_REV SBRevisionTable[] = { #define PREFIX_ZERO 0x20 #define ICH_REG_REV 0x08 -#define MSR_IA32_PLATFORM_ID 0x17 BOOLEAN mSetupInfoDone = FALSE; @@ -495,7 +496,7 @@ UpdateAdditionalInformation ( GetOptionalStringByIndex ((CHAR8*)((UINT8*)Type4Record + Type4Record->Hdr.Length), StrIndex, &ProcessorVersion); HiiSetString (mHiiHandle, STR_PROCESSOR_VERSION_VALUE, ProcessorVersion, NULL); - MicrocodeRevision = (UINT32) RShiftU64 (AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID), 32); + MicrocodeRevision = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32); UnicodeSPrint (NewString, sizeof (NewString), L"%8x", MicrocodeRevision); HiiSetString (mHiiHandle, STR_PROCESSOR_MICROCODE_VALUE, NewString, NULL); } @@ -590,22 +591,29 @@ VOID UpdateCPUInformation () { CHAR16 Buffer[40]; - UINT16 FamilyId; - UINT8 Model; - UINT8 SteppingId; - UINT8 ProcessorType; + UINT32 FamilyId; + UINT32 Model; + UINT32 SteppingId; EFI_STATUS Status; EFI_MP_SERVICES_PROTOCOL *MpService; UINTN MaximumNumberOfCPUs; UINTN NumberOfEnabledCPUs; UINT32 Buffer32 = 0xFFFFFFFF; // Keep buffer with unknown device + CPUID_VERSION_INFO_EAX Eax; + CPUID_VERSION_INFO_EBX Ebx; + CPUID_VERSION_INFO_ECX Ecx; + CPUID_VERSION_INFO_EDX Edx; - EfiCpuVersion (&FamilyId, &Model, &SteppingId, &ProcessorType); - - // - //we need raw Model data - // - Model = Model & 0xf; + AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx.Uint32); + FamilyId = Eax.Bits.FamilyId; + if (Eax.Bits.FamilyId == 0x0F) { + FamilyId |= (Eax.Bits.ExtendedFamilyId << 4); + } + Model = Eax.Bits.Model; + if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) { + Model |= (Eax.Bits.ExtendedModelId << 4); + } + SteppingId = Eax.Bits.SteppingId; // //Family/Model/Step @@ -633,7 +641,7 @@ UpdateCPUInformation () // // Update Mobile / Desktop / Tablet SKU // - Buffer32 =(UINT32) RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07; + Buffer32 =(UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07; switch(Buffer32){ case 0x0: @@ -903,7 +911,7 @@ UpdatePlatformInformation ( // VLV-QC Desktop 010 // VLV-QC Notebook 011 // - CpuFlavor = RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07; + CpuFlavor = RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07; switch(CpuFlavor){ case 0x0: @@ -1038,9 +1046,9 @@ UpdatePlatformInformation ( // // Microcode Revision // - EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0); - EfiCpuid (EFI_CPUID_VERSION_INFO, NULL); - MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32); + AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0); + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL); + MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32); UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion); HiiSetString(mHiiHandle,STRING_TOKEN(STR_PROCESSOR_MICROCODE_VALUE), Buffer, NULL); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c index 3583e324e6..4fd618a9a6 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c @@ -18,15 +18,12 @@ Abstract: #include #include #include -#include +#include +#include #include #include -#define EFI_CPUID_FAMILY 0x0F00 -#define EFI_CPUID_MODEL 0x00F0 -#define EFI_CPUID_STEPPING 0x000F - EFI_STATUS EFIAPI PpmPolicyEntry( @@ -36,7 +33,6 @@ PpmPolicyEntry( { EFI_BOOT_SERVICES *pBS; EFI_MP_SERVICES_PROTOCOL *MpService; - EFI_CPUID_REGISTER Cpuid01 = { 0, 0, 0, 0}; EFI_HANDLE Handle; EFI_STATUS Status; UINTN CpuCount; @@ -70,13 +66,13 @@ PpmPolicyEntry( // // Store the CPUID for use by SETUP items. // - AsmCpuid (EFI_CPUID_VERSION_INFO, &Cpuid01.RegEax, &Cpuid01.RegEbx, &Cpuid01.RegEcx, &Cpuid01.RegEdx); + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL); mDxePlatformPpmPolicy.Revision = PPM_PLATFORM_POLICY_PROTOCOL_REVISION_4; //Read CPU Mobile feature from PLATFORM_ID_MSR MSR(0x17) NOTFB_I_AM_NOT_MOBILE_FUSE_CLIAMC00H Bit 28 //Bit Description: { Disables Mobile features 0 = I am NOT a mobile part 1 = I am a mobile part (default)"} - CPUMobileFeature = ((RShiftU64 (AsmReadMsr64(EFI_MSR_IA32_PLATFORM_ID), 28)) & 0x1); + CPUMobileFeature = ((RShiftU64 (AsmReadMsr64(MSR_IA32_PLATFORM_ID), 28)) & 0x1); if (!EFI_ERROR(Status)) { if (CPUMobileFeature == 1){//CPU mobile feature diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf index 2c0a13f6af..5bcce02983 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf @@ -27,6 +27,7 @@ [Sources] [Packages] MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec Vlv2TbltDevicePkg/PlatformPkg.dec Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c index 684cda83ec..d5a4243624 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c @@ -23,8 +23,9 @@ Abstract: #include "MiscSubclassDriver.h" #include -#include #include +#include +#include VOID @@ -32,18 +33,24 @@ GetCPUStepping ( ) { CHAR16 Buffer[40]; - UINT16 FamilyId; - UINT8 Model; - UINT8 SteppingId; - UINT8 ProcessorType; + UINT32 FamilyId; + UINT32 Model; + UINT32 SteppingId; + CPUID_VERSION_INFO_EAX Eax; + CPUID_VERSION_INFO_EBX Ebx; + CPUID_VERSION_INFO_ECX Ecx; + CPUID_VERSION_INFO_EDX Edx; - - EfiCpuVersion (&FamilyId, &Model, &SteppingId, &ProcessorType); - - // - //we need raw Model data - // - Model = Model & 0xf; + AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx.Uint32); + FamilyId = Eax.Bits.FamilyId; + if (Eax.Bits.FamilyId == 0x0F) { + FamilyId |= (Eax.Bits.ExtendedFamilyId << 4); + } + Model = Eax.Bits.Model; + if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) { + Model |= (Eax.Bits.ExtendedModelId << 4); + } + SteppingId = Eax.Bits.SteppingId; // //Family/Model/Step @@ -243,9 +250,9 @@ GetUcodeVersion() // // Microcode Revision // - EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0); - EfiCpuid (EFI_CPUID_VERSION_INFO, NULL); - MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32); + AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0); + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL); + MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32); UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion); HiiSetString(mHiiHandle,STRING_TOKEN(STR_MISC_UCODE_VERSION), Buffer, NULL); } diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c index 97a782e362..f1bb15ae6e 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c @@ -29,7 +29,6 @@ Abstract: #include #include -#include #include #include #include @@ -73,7 +72,6 @@ SB_REV SBRevisionTable[] = { #define PREFIX_ZERO 0x20 #define ICH_REG_REV 0x08 -#define MSR_IA32_PLATFORM_ID 0x17 #define CHARACTER_NUMBER_FOR_VALUE 30 @@ -565,7 +563,7 @@ UpdatePlatformInformation ( // //CPU flavor // - CpuFlavor = RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07; + CpuFlavor = RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07; switch(CpuFlavor){ case 0x0: @@ -661,9 +659,9 @@ UpdatePlatformInformation ( // // Microcode Revision // - EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0); - EfiCpuid (EFI_CPUID_VERSION_INFO, NULL); - MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32); + AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0); + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL); + MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32); UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion); HiiSetString(mHiiHandle,STRING_TOKEN(STR_MISC_PROCESSOR_MICROCODE_VALUE), Buffer, NULL); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c index e71a03ceac..8a52d017c1 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c @@ -20,7 +20,6 @@ Abstract: #include "MiscSubclassDriver.h" #include -#include #include #include @@ -102,7 +101,7 @@ DetermineiFsbFromMsr ( // Determine the processor core frequency // UINT64 Temp; - Temp = (EfiReadMsr (BSEL_CR_OVERCLOCK_CONTROL)) & FUSE_BSEL_MASK; + Temp = (AsmReadMsr64 (BSEL_CR_OVERCLOCK_CONTROL)) & FUSE_BSEL_MASK; return miFSBFrequencyTable[(UINT32)(Temp)]; } diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf index 016fb53b18..94d9cd67e7 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf @@ -103,7 +103,6 @@ [LibraryClasses] UefiLib BiosIdLib PrintLib - CpuIA32Lib PchPlatformLib NetLib HobLib diff --git a/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh b/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh index 03fa062310..1705b1628b 100755 --- a/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh +++ b/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh @@ -104,6 +104,9 @@ for (( i=1; i<=$#; )) elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/X64" ]; then Arch=X64 shift + elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/IA32" ]; then + Arch=IA32 + shift elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/YL" ]; then SpiLock=1 shift @@ -243,11 +246,11 @@ build ##********************************************************************** echo Skip "Running fce..." +cp -f $BUILD_PATH/FV/VLV.fd $BUILD_PATH/FV/Vlv.ROM + ##********************************************************************** ## Build Capsules ##********************************************************************** -cp -f $WORKSPACE/Build/Vlv2TbltDevicePkg/${TARGET}_${TOOL_CHAIN_TAG}/FV/VLV.fd \ - $WORKSPACE/Build/Vlv2TbltDevicePkg/${TARGET}_${TOOL_CHAIN_TAG}/FV/Vlv.ROM build -p $PLATFORM_PKG_PATH/PlatformCapsuleGcc.dsc echo -- 2.21.0.windows.1