From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: michael.d.kinney@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Mon, 22 Jul 2019 15:59:08 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jul 2019 15:59:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,296,1559545200"; d="scan'208";a="169386502" Received: from mdkinney-mobl2.amr.corp.intel.com ([10.254.83.213]) by fmsmga008.fm.intel.com with ESMTP; 22 Jul 2019 15:59:06 -0700 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Zailiang Sun , Yi Qian , Gary Lin Subject: [edk2-platforms Patch V3 09/12] Vlv2TbltDevicePkg: Add XCODE5 4K alignment DLINK_FLAGS Date: Mon, 22 Jul 2019 15:58:56 -0700 Message-Id: <20190722225859.24724-10-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190722225859.24724-1-michael.d.kinney@intel.com> References: <20190722225859.24724-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Cc: Zailiang Sun Cc: Yi Qian Cc: Gary Lin Signed-off-by: Michael D Kinney --- Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 2 ++ Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index 5149dd5aa4..30b47d8f32 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -1248,6 +1248,7 @@ [BuildOptions] [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + XCODE:*_*_*_DLINK_FLAGS = -segalign 0x1000 # # Force PE/COFF sections to be aligned at 4KB boundaries to support page level @@ -1256,6 +1257,7 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] [BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE] MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + XCODE:*_*_*_DLINK_FLAGS = -segalign 0x1000 [BuildOptions.Common.EDKII] !if $(CLKGEN_CONFIG_EXTRA_ENABLE) == TRUE diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index 466512242c..57316d487b 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -1263,6 +1263,7 @@ [BuildOptions] [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + XCODE:*_*_*_DLINK_FLAGS = -segalign 0x1000 # # Force PE/COFF sections to be aligned at 4KB boundaries to support page level @@ -1271,6 +1272,7 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] [BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE] MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + XCODE:*_*_*_DLINK_FLAGS = -segalign 0x1000 [BuildOptions.Common.EDKII] !if $(CLKGEN_CONFIG_EXTRA_ENABLE) == TRUE -- 2.21.0.windows.1