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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id c1sm211036683wrh.1.2019.08.08.04.51.54 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 08 Aug 2019 04:51:55 -0700 (PDT) Date: Thu, 8 Aug 2019 12:51:53 +0100 From: "Leif Lindholm" To: Marcin Wojtas Cc: devel@edk2.groups.io, ard.biesheuvel@linaro.org, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Subject: Re: [edk2-platforms: PATCH 0/9] Marvell Octeon CN913X SoC family support Message-ID: <20190808115153.GX25813@bivouac.eciton.net> References: <1565220630-1653-1-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1565220630-1653-1-git-send-email-mw@semihalf.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Marcin, On Thu, Aug 08, 2019 at 01:30:21AM +0200, Marcin Wojtas wrote: > Hi, > > Marvell Octeon CN913X SoC is a new device, which is built of > upgraded hardware blocks known from previously supported line > of SoCs. It is avaialble in 3 variants - CN9130/CN9131/CN9132. > > CN9130 is made of a single Application Processor unit > (AP807) and one internal south bridge (CP115). It can > be extended to CN9131 (internal + external south bridges). > The CN9132 has 3 south bridge units. > > This patchset adds all necessary components (.dsc/.fdf, > libraries, ACPI, DT) to support all 3 variants, which > are available on a modular CN913x Development Board. Thanks for this contribution. Do you have any further information on this SoC/Devboard? Searching only gets me the CN8xxx SoCs. > The patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/cn913x-upstream-r20190808 > > I'm looking forward to your comments or remarks. First issue I run into is that 9130/9131 bail out on DSDT.aml: "iasl" -p/work/git/tianocore/Build/Cn9130DbA-AARCH64/DEBUG_GCC5/AARCH64/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA/OUTPUT/Cn913xDbA/Dsdt.aml /work/git/tianocore/Build/Cn9130DbA-AARCH64/DEBUG_GCC5/AARCH64/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA/OUTPUT/Cn913xDbA/Dsdt.iiii /work/git/tianocore/Build/Cn9130DbA-AARCH64/DEBUG_GCC5/AARCH64/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA/OUTPUT/Cn913xDbA/Dsdt.iiii 17: DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130DBA", 3) Intel ACPI Component Architecture ASL+ Optimizing Compiler/Disassembler version 20181213 Copyright (c) 2000 - 2018 Intel Corporation ASL Input: /work/git/tianocore/Build/Cn9130DbA-AARCH64/DEBUG_GCC5/AARCH64/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA/OUTPUT/Cn913xDbA/Dsdt.iiii - 328 lines, 9303 bytes, 97 keywords Compilation complete. 1 Errors, 0 Warnings, 0 Remarks, 34 Optimizations Error 6155 - Invalid OEM Table ID ^ (Length cannot exceed 8 characters) This does not affect Cn9132DbA, since that one does not include the ACPI module. Is this intenional? Which version of iasl has this been tested with? (Plese don't respin a v2, I will go through things a bit more and provide feedback.) Best Regards, Leif > Best regards, > Marcin > > > Marcin Wojtas (9): > Marvell/Cn9130Db: Add ACPI tables > Marvell/Cn9130Db: Add DeviceTree > Marvell/Cn9130Db: Introduce board support > Marvell/Library: ArmadaSoCDescLib: Extend Xenon information > Marvell/Library: MppLib: Allow to configure more Xenon PHYs > Marvell/Library: IcuLib: Fix debug information > Marvell/Cn9131Db: Introduce board support > Marvell/Cn9132Db: Introduce board support > Marvell/Drivers: SmbiosPlatformDxe: Use more generic board name > > Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc | 107 ++++ > Platform/Marvell/Cn913xDb/Cn9131DbA.dsc.inc | 72 +++ > Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc | 72 +++ > Platform/Marvell/Cn913xDb/Cn9130DbA.dsc | 46 ++ > Platform/Marvell/Cn913xDb/Cn9131DbA.dsc | 47 ++ > Platform/Marvell/Cn913xDb/Cn9132DbA.dsc | 45 ++ > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9130DbABoardDescLib.inf | 29 + > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.inf | 29 + > Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 37 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA.inf | 56 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA.inf | 57 ++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 + > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.inf | 22 + > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.inf | 22 + > Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.h | 25 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 5 +- > Silicon/Marvell/OcteonTx/AcpiTables/T91/AcpiHeader.h | 39 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Pcie.h | 20 + > Silicon/Marvell/OcteonTx/AcpiTables/T91/IcuInterrupts.h | 36 ++ > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9130DbABoardDescLib.c | 126 +++++ > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.c | 135 +++++ > Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 215 ++++++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 +- > Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 4 +- > Silicon/Marvell/Library/IcuLib/IcuLib.c | 4 +- > Silicon/Marvell/Library/MppLib/MppLib.c | 4 +- > Platform/Marvell/Cn913xDb/Cn9130DbA.fdf.inc | 17 + > Platform/Marvell/Cn913xDb/Cn9131DbA.fdf.inc | 18 + > Platform/Marvell/Cn913xDb/Cn9132DbA.fdf.inc | 13 + > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 98 ++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 324 ++++++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Mcfg.aslc | 41 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Fadt.aslc | 80 +++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Gtdt.aslc | 58 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Madt.aslc | 135 +++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc | 210 ++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Spcr.aslc | 49 ++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi | 43 ++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi | 264 ++++++++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi | 10 + > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi | 552 ++++++++++++++++++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts | 185 +++++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi | 168 ++++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi | 126 +++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts | 29 + > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi | 175 +++++++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts | 70 +++ > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi | 159 ++++++ > 48 files changed, 4113 insertions(+), 21 deletions(-) > create mode 100644 Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9131DbA.dsc.inc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9130DbA.dsc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9131DbA.dsc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9132DbA.dsc > create mode 100644 Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9130DbABoardDescLib.inf > create mode 100644 Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.inf > create mode 100644 Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.inf > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA.inf > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA.inf > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.inf > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.inf > create mode 100644 Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.h > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/AcpiHeader.h > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Pcie.h > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/IcuInterrupts.h > create mode 100644 Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9130DbABoardDescLib.c > create mode 100644 Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.c > create mode 100644 Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c > create mode 100644 Platform/Marvell/Cn913xDb/Cn9130DbA.fdf.inc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9131DbA.fdf.inc > create mode 100644 Platform/Marvell/Cn913xDb/Cn9132DbA.fdf.inc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Mcfg.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Fadt.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Gtdt.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Madt.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Spcr.aslc > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi > > -- > 2.7.4 >