From: "Dong, Eric" <eric.dong@intel.com>
To: devel@edk2.groups.io
Cc: Ray Ni <ray.ni@intel.com>, Laszlo Ersek <lersek@redhat.com>
Subject: [Patch v3 0/6] Add "test then write" mechanism
Date: Thu, 15 Aug 2019 10:50:30 +0800 [thread overview]
Message-ID: <20190815025036.6780-1-eric.dong@intel.com> (raw)
v3 changes:
1. Avoid changing exist API CpuRegisterTableWrite, add new API CpuRegisterTableTestThenWrite which align new adds macros.
Only 1/6 patch been changed in v3.
V2 changes:
1. Split CR read/write action in to one discrete patch 2. Keep the old logic which continue the process if error found.
Below code is current implementation:
if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
Msr,
MSR_IA32_FEATURE_CONTROL,
MSR_IA32_FEATURE_CONTROL_REGISTER,
Bits.Lock,
1
);
}
With below steps, the Bits.Lock bit will lose its value:
1. Trig normal boot, the Bits.Lock is 0. 1 will be added
into the register table and then will set to the MSR.
2. Trig warm reboot, MSR value preserves. After normal boot phase,
the Bits.Lock is 1, so it will not be added into the register
table during the warm reboot phase.
3. Trig S3 then resume, the Bits.Lock change to 0 and Bits.Lock is
not added in register table during normal boot phase. so it's
still 0 after resume.
This is not an expect behavior. The expect result is the value should always 1 after booting or resuming from S3.
The root cause for this issue is
1. driver bases on current value to insert the "set value action" to
the register table.
2. Some MSRs may reserve their value during warm reboot. So the insert
action may be skip after warm reboot.
The solution for this issue is:
1. Always add "Test then Set" action for above referred MSRs.
2. Detect current value before set new value. Only set new value when
current value not same as new value.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Eric Dong (6):
UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros.
UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action.
UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic.
UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action.
UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value
logic.
UefiCpuPkg/CpuCommonFeaturesLib: Use new macros.
UefiCpuPkg/Include/AcpiCpuData.h | 1 +
.../Include/Library/RegisterCpuFeaturesLib.h | 91 +++++++++++
.../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 --
.../CpuCommonFeaturesLib.c | 8 +-
.../CpuCommonFeaturesLib/FeatureControl.c | 141 ++++++------------
.../CpuCommonFeaturesLib/MachineCheck.c | 23 ++-
.../CpuFeaturesInitialize.c | 139 +++++++++++------
.../RegisterCpuFeaturesLib.c | 45 +++++-
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 133 +++++++++++------
9 files changed, 375 insertions(+), 221 deletions(-)
--
2.21.0.windows.1
next reply other threads:[~2019-08-15 2:50 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-15 2:50 Dong, Eric [this message]
2019-08-15 2:50 ` [Patch v3 1/6] UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros Dong, Eric
2019-08-16 1:14 ` Zeng, Star
2019-08-16 1:27 ` Dong, Eric
2019-08-16 2:08 ` Zeng, Star
2019-08-16 2:20 ` Dong, Eric
2019-08-16 3:44 ` Liming Gao
2019-08-16 3:58 ` Dong, Eric
2019-08-15 2:50 ` [Patch v3 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action Dong, Eric
2019-08-15 2:50 ` [Patch v3 3/6] UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic Dong, Eric
2019-08-15 2:50 ` [Patch v3 4/6] UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action Dong, Eric
2019-08-15 2:50 ` [Patch v3 5/6] UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value logic Dong, Eric
2019-08-15 2:50 ` [Patch v3 6/6] UefiCpuPkg/CpuCommonFeaturesLib: Use new macros Dong, Eric
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190815025036.6780-1-eric.dong@intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox