From: "Gao, Zhichao" <zhichao.gao@intel.com>
To: devel@edk2.groups.io
Cc: "Gao, Zhichao" <zhichao.gao@intel.com>, Ray Ni <ray.ni@intel.com>,
Oleksiy <oleksiyy@ami.com>, Liming Gao <liming.gao@intel.com>
Subject: [PATCH v3 1/1] ShellPkg/Pci.c: Update supported link speed to PCI5.0
Date: Sun, 1 Sep 2019 23:14:43 +0800 [thread overview]
Message-ID: <20190901151443.11568-1-zhichao.gao@intel.com> (raw)
From: "Gao, Zhichao" <zhichao.gao@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1955
Refer to PCI express base specification Reversion 5.0, Version
1.0, Table 7-33, Supported Link Speeds Vector bit 3 indicate
the speed 16 GT/s and bit 4 indicate the speed 32 GT/s.
Add the support to shell command 'pci ...'.
Change the MaxLinkSpeed other values' result from 'Unknown'
to 'Reserved' to make the result align.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Oleksiy <oleksiyy@ami.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
---
V2:
Update the copyright.
V3:
Update the link speed to support PCI 5.0.
Update the support
.../Library/UefiShellDebug1CommandsLib/Pci.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index ba9caa774398..3e138188cec3 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -1,7 +1,7 @@
/** @file
Main file for Pci shell Debug1 function.
- Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>
(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -4515,8 +4515,14 @@ ExplainPcieLinkCap (
case 3:
MaxLinkSpeed = L"8.0 GT/s";
break;
+ case 4:
+ MaxLinkSpeed = L"16.0 GT/s";
+ break;
+ case 5:
+ MaxLinkSpeed = L"32.0 GT/s";
+ break;
default:
- MaxLinkSpeed = L"Unknown";
+ MaxLinkSpeed = L"Reserved";
break;
}
ShellPrintEx (-1, -1,
@@ -4672,6 +4678,12 @@ ExplainPcieLinkStatus (
case 3:
CurLinkSpeed = L"8.0 GT/s";
break;
+ case 4:
+ CurLinkSpeed = L"16.0 GT/s";
+ break;
+ case 5:
+ CurLinkSpeed = L"32.0 GT/s";
+ break;
default:
CurLinkSpeed = L"Reserved";
break;
--
2.21.0.windows.1
next reply other threads:[~2019-09-01 15:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-01 15:14 Gao, Zhichao [this message]
2019-09-04 4:09 ` [PATCH v3 1/1] ShellPkg/Pci.c: Update supported link speed to PCI5.0 Ni, Ray
2019-09-04 7:58 ` Liming Gao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190901151443.11568-1-zhichao.gao@intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox