From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: zhichao.gao@intel.com) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by groups.io with SMTP; Sun, 01 Sep 2019 08:14:58 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Sep 2019 08:14:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,455,1559545200"; d="scan'208";a="198420201" Received: from fieedk001.ccr.corp.intel.com ([10.239.33.119]) by fmsmga001.fm.intel.com with ESMTP; 01 Sep 2019 08:14:56 -0700 From: "Gao, Zhichao" To: devel@edk2.groups.io Cc: "Gao, Zhichao" , Ray Ni , Oleksiy , Liming Gao Subject: [PATCH v3 1/1] ShellPkg/Pci.c: Update supported link speed to PCI5.0 Date: Sun, 1 Sep 2019 23:14:43 +0800 Message-Id: <20190901151443.11568-1-zhichao.gao@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: "Gao, Zhichao" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1955 Refer to PCI express base specification Reversion 5.0, Version 1.0, Table 7-33, Supported Link Speeds Vector bit 3 indicate the speed 16 GT/s and bit 4 indicate the speed 32 GT/s. Add the support to shell command 'pci ...'. Change the MaxLinkSpeed other values' result from 'Unknown' to 'Reserved' to make the result align. Cc: Ray Ni Cc: Oleksiy Cc: Liming Gao Signed-off-by: Zhichao Gao --- V2: Update the copyright. V3: Update the link speed to support PCI 5.0. Update the support .../Library/UefiShellDebug1CommandsLib/Pci.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c index ba9caa774398..3e138188cec3 100644 --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c @@ -1,7 +1,7 @@ /** @file Main file for Pci shell Debug1 function. - Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.
(C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
(C) Copyright 2016 Hewlett Packard Enterprise Development LP
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -4515,8 +4515,14 @@ ExplainPcieLinkCap ( case 3: MaxLinkSpeed = L"8.0 GT/s"; break; + case 4: + MaxLinkSpeed = L"16.0 GT/s"; + break; + case 5: + MaxLinkSpeed = L"32.0 GT/s"; + break; default: - MaxLinkSpeed = L"Unknown"; + MaxLinkSpeed = L"Reserved"; break; } ShellPrintEx (-1, -1, @@ -4672,6 +4678,12 @@ ExplainPcieLinkStatus ( case 3: CurLinkSpeed = L"8.0 GT/s"; break; + case 4: + CurLinkSpeed = L"16.0 GT/s"; + break; + case 5: + CurLinkSpeed = L"32.0 GT/s"; + break; default: CurLinkSpeed = L"Reserved"; break; -- 2.21.0.windows.1