From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=oDs4N3NA; spf=pass (domain: linaro.org, ip: 209.85.128.66, mailfrom: leif.lindholm@linaro.org) Received: from mail-wm1-f66.google.com (mail-wm1-f66.google.com [209.85.128.66]) by groups.io with SMTP; Thu, 05 Sep 2019 09:50:10 -0700 Received: by mail-wm1-f66.google.com with SMTP id r195so3925344wme.2 for ; Thu, 05 Sep 2019 09:50:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=z6nRayDBM2O1jdOlWb5HYisaDQZfW6csrXLDjMjCp58=; b=oDs4N3NAfg91enFR+E7J0tJbPSeWIe90fNBSP6WeIOY8MMW/aUYzXLJaoNSBqTqjn9 E4PK1YtOJ9a57ZpwWD5JgokV3dXf73LFmE6LS8DTQAXuvYaFDG0kRqKAXmCcn9eZAlPT jOJNFtD5HmUTVed51xegADgqNZOJJ3kEg4dULoBKCJ+GC/fqe5lCgROEis8Y0+84JQjG MDOOGMUG8ulbYxci8pja7g/spedlkfEQ8ibu/7ULl+Zq0ISt4cqgr8MMpM9spWkZextW vY2xdroiVrzkoFzgbTVfKGkjqUL285ayPPzWdcidcA6klK9D6cqJB7Lc1s9iGYmOkJzN xBbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=z6nRayDBM2O1jdOlWb5HYisaDQZfW6csrXLDjMjCp58=; b=VOm0mzS49LCZyWuJBr2mDD4FGr1VxUpR6i3Urgy/yxbdvOcc0FPy2Yh1Bf9kHWqT+h BQ1GJ8cltcLJEdtAWodULxq07/tS/Q0E4ZEBaOO/KZ5IpJL4p7WwXQrEWtenSYUHC/38 6BFbJ89W0KizHWsJ2jPJCsHC82ro5/4KFeGw1OHKlBABydakcuwGZlAYKYE7pSfEgQ6y nPAzmfOMreWxn4/Hf/2nhnXmn3H5oF3r+0yCz6QjCIrs9YxNIFT61Rb+qy0osvcY7c8S Ht8KMp/x1hnwYhmx9p2AF/s5n74IKbaE4iEHF7XZF5AJW4+vm1gvfIvgWWpRnDh4YyXB FwVg== X-Gm-Message-State: APjAAAX59i/tBC+Xk237SpoAEgwvMcGO/1Ns4bOaQI32tEguIo2kR/nu Q18+GhfHUVN8G6hEJT++jH66g5wtK2M= X-Google-Smtp-Source: APXvYqzw08hs2ZltMXZ2TOfPWcL2rCcm44iFWoIyIT2DGg04X64quQTSVQLHiC3/DGwrEd27+YMr2A== X-Received: by 2002:a05:600c:2105:: with SMTP id u5mr4066879wml.150.1567702208076; Thu, 05 Sep 2019 09:50:08 -0700 (PDT) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id a130sm4707466wmf.48.2019.09.05.09.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Sep 2019 09:50:07 -0700 (PDT) Date: Thu, 5 Sep 2019 17:50:05 +0100 From: "Leif Lindholm" To: devel@edk2.groups.io, abner.chang@hpe.com Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 19/22]: MdeModulePkg/DxeIplPeim:RISC-V platform DXEIPL. Message-ID: <20190905165005.GL29255@bivouac.eciton.net> References: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> <1567593797-26216-20-git-send-email-abner.chang@hpe.com> MIME-Version: 1.0 In-Reply-To: <1567593797-26216-20-git-send-email-abner.chang@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Sep 04, 2019 at 06:43:14PM +0800, Abner Chang wrote: > - Implement RISC-V DxeIpl. > - Provide DxeIpl platform implementation-specifc library for RISC-V platform. Two libraries are provided in this commit, > * Defualt library which simply switch stack and transfer > control to DXE core. > * Switch stack, privilege mode and then transfer control to > DXE core through RISC-V opensbi. No comments beyond SPDX/license and contribution agreement. / Leif > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Abner Chang > --- > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 13 +++- > MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c | 76 ++++++++++++++++++++++ > 2 files changed, 88 insertions(+), 1 deletion(-) > create mode 100644 MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c > > diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > index 98bc17f..5532323 100644 > --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > @@ -7,6 +7,7 @@ > # > # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
> # Copyright (c) 2017, AMD Incorporated. All rights reserved.
> +# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -25,7 +26,7 @@ > # > # The following information is for reference only and not required by the build tools. > # > -# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only) AARCH64 > +# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only) AARCH64 RISCV64 > # > > [Sources] > @@ -49,6 +50,9 @@ > [Sources.ARM, Sources.AARCH64] > Arm/DxeLoadFunc.c > > +[Sources.RISCV64] > + RiscV64/DxeLoadFunc.c > + > [Packages] > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec > @@ -56,6 +60,9 @@ > [Packages.ARM, Packages.AARCH64] > ArmPkg/ArmPkg.dec > > +[Packages.RISCV64] > + RiscVPkg/RiscVPkg.dec > + > [LibraryClasses] > PcdLib > MemoryAllocationLib > @@ -75,6 +82,10 @@ > [LibraryClasses.ARM, LibraryClasses.AARCH64] > ArmMmuLib > > +[LibraryClasses.RISCV64] > + RiscVPlatformDxeIplLib > + RiscVOpensbiLib > + > [Ppis] > gEfiDxeIplPpiGuid ## PRODUCES > gEfiPeiDecompressPpiGuid ## PRODUCES > diff --git a/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c > new file mode 100644 > index 0000000..934dfa5 > --- /dev/null > +++ b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c > @@ -0,0 +1,76 @@ > +/** @file > + RISC-V specific functionality for DxeLoad. > + > + Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +**/ > + > +#include "DxeIpl.h" > +#include "Library/RiscVPlatformDxeIpl.h" > + > +typedef > +VOID* > +(EFIAPI *DXEENTRYPOINT) ( > + IN VOID *HobStart > + ); > + > +/** > + Transfers control to DxeCore. > + > + This function performs a CPU architecture specific operations to execute > + the entry point of DxeCore with the parameters of HobList. > + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. > + > + @param DxeCoreEntryPoint The entry point of DxeCore. > + @param HobList The start of HobList passed to DxeCore. > + > +**/ > +VOID > +HandOffToDxeCore ( > + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, > + IN EFI_PEI_HOB_POINTERS HobList > + ) > +{ > + VOID *BaseOfStack; > + VOID *TopOfStack; > + EFI_STATUS Status; > + // > + // > + // Allocate 128KB for the Stack > + // > + BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); > + ASSERT (BaseOfStack != NULL); > + > + // > + // Compute the top of the stack we were allocated. Pre-allocate a UINTN > + // for safety. > + // > + TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); > + TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); > + > + // > + // End of PEI phase signal > + // > + Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi); > + ASSERT_EFI_ERROR (Status); > + > + // > + // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore. > + // > + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE); > + > + DEBUG ((EFI_D_INFO, "DXE Core new stack at %x, stack pointer at %x\n", BaseOfStack, TopOfStack)); > + > + // > + // Transfer the control to the entry point of DxeCore. > + // > + RiscVPlatformHandOffToDxeCore (BaseOfStack, TopOfStack, DxeCoreEntryPoint, HobList); > +} > + > -- > 2.7.4 > > > >