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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id h125sm4511053wmf.31.2019.09.05.10.15.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Sep 2019 10:15:36 -0700 (PDT) Date: Thu, 5 Sep 2019 18:15:34 +0100 From: "Leif Lindholm" To: devel@edk2.groups.io, abner.chang@hpe.com Subject: Re: [edk2-devel] [PATCH 00/22] RISC-V EDK2 Port on edk2-staging/RISC-V-V2 branch Message-ID: <20190905171534.GP29255@bivouac.eciton.net> References: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> MIME-Version: 1.0 In-Reply-To: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Abner, Many thanks for this. I have now gone through all of the patches, and left some specific as well as some general comments. Please address those, or comment on why you would prefer not changing. For v2, could you do a few things please (some of which I've mentioned throughout my comments on various patches): - Run PatchCheck.py on all patches and address the output. If you disagree with some specific failure, please comment on this below the --- in the commit message in the generated patch. - Run SetupGit.py in your edk2 repository (this includes installing git-python) - Run BaseTools/Scripts/GetMaintainer.py on each of the commits, and add a Cc: tag for each person listed in the output to the commit message of that patch. Then add all of those Cc:d people as Cc: tags to the [0/xx patch for the next set. This wat they will all get Cc:d on the patches that are relevant to them. Few read all messages posted to edk2-devel diligently, so it's possible they will have missed this set completely. (Feel free to reply to your patches from v1, adding the relevant reviewers to cc.) - Add your own entry in Maintainers.txt for the new packages. My suggestion would be that you add yourself as a designated reviewer (R:) for now. Find some people willing to actually sling the patches and add them as M: for now. I would be willing to be one of them as long as you can also find others :) - Convert all of the .uni files to UTF-8 (no BOM, I think?). Additionally, it would be really helpful if you could include a link to the set on a branch in a public git repository somewhere. Converting the .uni files to UTF-8 should make it possible for my usual scripts to start working again, but being able to just pull from a repo is even easier. Best Regards, Leif On Wed, Sep 04, 2019 at 06:42:55PM +0800, Abner Chang wrote: > This branch "RISC-V-V2" is used to contribute RISC-V architecture on EDK2. > Compare to the old branch "RISC-V", this branch "RISC-V-V2" is created based on > the most recent edk2/master @37eef910. This is easier for reviewers to have > clear ideas of edk2 code changes for RISC-V EDK2 implementation. > Because of the code changes made on old branch "RISC-V" is stale and not > compliant with the latest RISC-V spec, this new branch has the fresh changes > for RISC-V EDK2 implementation. > > The main changes of these series of patches are, > - Add RiscVPkg which conform with RISC-V Privilege Spec v1.10. > - Incorporate and leverage RISC-V OpenSBI to provide EDK2 port OpenSBI library. > - Provide RISC-V platform implementation specific drivers to EDK2 RISC-V platform > package. > - Provide generic RISC-V SMBIOS DXE drive to create SMBIOS type 4, 7 and 44 records, > in which the SMBIOS type 44 record is introduced in SMBIOS spec 3.3.0. > > > Abner Chang (22): > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg: RISC-V processor package. > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/Include: Add header files > of RISC-V CPU package > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg: RISC-V sections in DEC > file. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/Include: RISC-V definitions. > [edk2-staging/RISC-V-V2 PATCH v1]: MdeModulePkg/CapsuleRuntimeDxe: Add > RISC-V arch. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BaseCacheMaintenanceLib: > RISC-V cache maintenance implementation. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BaseIoLibIntrinsic: RISC-V > I/O intrinsic functions. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BasePeCoff: Add RISC-V > PE/Coff related code. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BaseCpuLib: RISC-V Base CPU > library implementation. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BaseSynchronizationLib: > RISC-V cache related code. > [edk2-staging/RISC-V-V2 PATCH v1]: BaseTools: BaseTools changes for > RISC-V platform. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/BaseLib: BaseLib for RISC-V > RV64 Processor. > [edk2-staging/RISC-V-V2 PATCH v1]: MdePkg/Include: Update SmBios > header file. > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/opesbi: Add > opensbi-HOWTO.txt > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/RealTimeClockRuntimeDxe: > Add RISC-V RTC Runtime Driver > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/CpuDxe: Add RISC-V CPU DXE > driver. > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/SmbiosDxe: RISC-V platform > generic SMBIOS DXE driver > [edk2-staging/RISC-V-V2 PATCH v1]: RiscVPkg/Library: Add/Update/Remove > Library instances for RISC-V platform > [edk2-staging/RISC-V-V2 PATCH v1]: MdeModulePkg/DxeIplPeim:RISC-V > platform DXEIPL. > [edk2-staging/RISC-V-V2 PATCH v1]: MdeModulePkg/Logo > [edk2-staging/RISC-V-V2 PATCH v1]: NetworkPkg > [edk2-staging/RISC-V-V2 PATCH v1]: BaseTools/Scripts > > BaseTools/Conf/build_rule.template | 23 +- > BaseTools/Conf/tools_def.template | 108 +- > BaseTools/Scripts/GccBaseRiscV.lds | 71 ++ > BaseTools/Source/C/Common/BasePeCoff.c | 19 +- > BaseTools/Source/C/Common/PeCoffLoaderEx.c | 96 ++ > BaseTools/Source/C/GenFv/GenFvInternalLib.c | 281 ++++- > BaseTools/Source/C/GenFw/Elf32Convert.c | 6 +- > BaseTools/Source/C/GenFw/Elf64Convert.c | 273 ++++- > BaseTools/Source/C/GenFw/elf_common.h | 63 ++ > .../Source/C/Include/IndustryStandard/PeImage.h | 10 + > BaseTools/Source/Python/Common/DataType.py | 1075 ++++++++++---------- > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 13 +- > MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c | 76 ++ > MdeModulePkg/Logo/Logo.inf | 2 +- > .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf | 9 +- > MdePkg/Include/IndustryStandard/PeImage.h | 14 +- > MdePkg/Include/IndustryStandard/SmBios.h | 74 +- > MdePkg/Include/Library/BaseLib.h | 67 ++ > MdePkg/Include/Protocol/DebugSupport.h | 55 + > MdePkg/Include/Protocol/PxeBaseCode.h | 8 + > MdePkg/Include/RiscV64/ProcessorBind.h | 336 ++++++ > MdePkg/Include/Uefi/UefiBaseType.h | 25 + > MdePkg/Include/Uefi/UefiSpec.h | 11 + > .../BaseCacheMaintenanceLib.inf | 4 + > .../Library/BaseCacheMaintenanceLib/RiscVCache.c | 242 +++++ > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 4 + > MdePkg/Library/BaseCpuLib/RiscV/Cpu.s | 25 + > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 8 +- > MdePkg/Library/BaseIoLibIntrinsic/IoLibRiscV.c | 697 +++++++++++++ > MdePkg/Library/BaseLib/BaseLib.inf | 18 +- > MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c | 33 + > MdePkg/Library/BaseLib/RiscV64/CpuPause.c | 35 + > MdePkg/Library/BaseLib/RiscV64/DisableInterrupts.c | 33 + > MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c | 33 + > MdePkg/Library/BaseLib/RiscV64/FlushCache.S | 28 + > MdePkg/Library/BaseLib/RiscV64/GetInterruptState.c | 43 + > .../Library/BaseLib/RiscV64/InternalSwitchStack.c | 61 ++ > MdePkg/Library/BaseLib/RiscV64/LongJump.c | 38 + > .../Library/BaseLib/RiscV64/RiscVCpuBreakpoint.S | 20 + > MdePkg/Library/BaseLib/RiscV64/RiscVCpuPause.S | 20 + > MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S | 33 + > .../Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S | 61 ++ > MdePkg/Library/BaseLib/RiscV64/Unaligned.c | 270 +++++ > MdePkg/Library/BaseLib/RiscV64/riscv_asm.h | 194 ++++ > MdePkg/Library/BaseLib/RiscV64/riscv_encoding.h | 574 +++++++++++ > MdePkg/Library/BaseLib/RiscV64/sbi_const.h | 53 + > MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +- > MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf | 5 + > MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni | 4 +- > .../Library/BasePeCoffLib/BasePeCoffLibInternals.h | 1 + > .../Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c | 149 +++ > .../BaseSynchronizationLib.inf | 6 + > .../RiscV64/Synchronization.c | 189 ++++ > .../RiscV64/SynchronizationAsm.s | 84 ++ > MdePkg/MdePkg.dec | 9 + > NetworkPkg/Network.dsc.inc | 2 +- > RiscVPkg/Include/Library/RealTimeClockLib.h | 136 +++ > RiscVPkg/Include/Library/RiscVCpuLib.h | 74 ++ > RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h | 47 + > .../Library/RiscVPlatformTempMemoryInitLib.h | 23 + > RiscVPkg/Include/ProcessorSpecificDataHob.h | 99 ++ > RiscVPkg/Include/RiscV.h | 168 +++ > RiscVPkg/Include/SmbiosProcessorSpecificData.h | 64 ++ > RiscVPkg/Include/sbi/SbiFirmwareContext.h | 44 + > RiscVPkg/Include/sbi/sbi.h | 103 ++ > RiscVPkg/Include/sbi/sbi_bits.h | 23 + > RiscVPkg/Include/sbi/sbi_types.h | 24 + > .../PeiServicesTablePointerLibOpenSbi.inf | 45 + > .../PeiServicesTablePointerLibOpenSbi.uni | Bin 0 -> 2462 bytes > .../PeiServicesTablePointerOpenSbi.c | 127 +++ > RiscVPkg/Library/RiscVCpuLib/Cpu.s | 121 +++ > RiscVPkg/Library/RiscVCpuLib/RiscVCpuLib.inf | 46 + > .../RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c | 47 + > .../RiscVDxeIplHandoffLib.inf | 39 + > .../RiscVDxeIplHandoffOpenSbiLib.c | 108 ++ > .../RiscVDxeIplHandoffOpenSbiLib.inf | 39 + > .../RiscVExceptionLib/CpuExceptionHandler.s | 94 ++ > .../CpuExceptionHandlerDxeLib.inf | 47 + > .../RiscVExceptionLib/CpuExceptionHandlerLib.c | 187 ++++ > .../RiscVExceptionLib/CpuExceptionHandlerLib.uni | Bin 0 -> 1516 bytes > .../Library/RiscVOpensbiLib/RiscVOpensbiLib.inf | 65 ++ > .../RiscVPlatformTempMemoryInitLibNull.inf | 42 + > .../Riscv64/TempMemInit.s | 31 + > .../Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 40 + > RiscVPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 201 ++++ > RiscVPkg/Library/RiscVTimerLib/RiscVTimerLib.h | 26 + > RiscVPkg/RiscVPkg.dec | 57 ++ > RiscVPkg/RiscVPkg.uni | Bin 0 -> 1718 bytes > RiscVPkg/RiscVPkgExtra.uni | Bin 0 -> 1374 bytes > RiscVPkg/Universal/CpuDxe/CpuDxe.c | 324 ++++++ > RiscVPkg/Universal/CpuDxe/CpuDxe.h | 212 ++++ > RiscVPkg/Universal/CpuDxe/CpuDxe.inf | 66 ++ > RiscVPkg/Universal/CpuDxe/CpuDxe.uni | Bin 0 -> 1564 bytes > RiscVPkg/Universal/CpuDxe/CpuDxeExtra.uni | Bin 0 -> 1392 bytes > RiscVPkg/Universal/CpuDxe/CpuMp.h | 648 ++++++++++++ > .../RealTimeClockRuntimeDxe/RealTimeClock.c | 157 +++ > .../RealTimeClockRuntimeDxe.inf | 44 + > RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c | 343 +++++++ > RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.h | 38 + > RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf | 63 ++ > RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.uni | Bin 0 -> 1542 bytes > .../Universal/SmbiosDxe/RiscVSmbiosDxeExtra.uni | Bin 0 -> 1438 bytes > RiscVPkg/opensbi/opensbi-HOWTO.txt | 17 + > 103 files changed, 9195 insertions(+), 578 deletions(-) > create mode 100644 BaseTools/Scripts/GccBaseRiscV.lds > create mode 100644 MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c > create mode 100644 MdePkg/Include/RiscV64/ProcessorBind.h > create mode 100644 MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c > create mode 100644 MdePkg/Library/BaseCpuLib/RiscV/Cpu.s > create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibRiscV.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/CpuPause.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/DisableInterrupts.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/FlushCache.S > create mode 100644 MdePkg/Library/BaseLib/RiscV64/GetInterruptState.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/LongJump.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVCpuBreakpoint.S > create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVCpuPause.S > create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S > create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S > create mode 100644 MdePkg/Library/BaseLib/RiscV64/Unaligned.c > create mode 100644 MdePkg/Library/BaseLib/RiscV64/riscv_asm.h > create mode 100644 MdePkg/Library/BaseLib/RiscV64/riscv_encoding.h > create mode 100644 MdePkg/Library/BaseLib/RiscV64/sbi_const.h > create mode 100644 MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c > create mode 100644 MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.c > create mode 100644 MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.s > create mode 100644 RiscVPkg/Include/Library/RealTimeClockLib.h > create mode 100644 RiscVPkg/Include/Library/RiscVCpuLib.h > create mode 100644 RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h > create mode 100644 RiscVPkg/Include/Library/RiscVPlatformTempMemoryInitLib.h > create mode 100644 RiscVPkg/Include/ProcessorSpecificDataHob.h > create mode 100644 RiscVPkg/Include/RiscV.h > create mode 100644 RiscVPkg/Include/SmbiosProcessorSpecificData.h > create mode 100644 RiscVPkg/Include/sbi/SbiFirmwareContext.h > create mode 100644 RiscVPkg/Include/sbi/sbi.h > create mode 100644 RiscVPkg/Include/sbi/sbi_bits.h > create mode 100644 RiscVPkg/Include/sbi/sbi_types.h > create mode 100644 RiscVPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf > create mode 100644 RiscVPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.uni > create mode 100644 RiscVPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c > create mode 100644 RiscVPkg/Library/RiscVCpuLib/Cpu.s > create mode 100644 RiscVPkg/Library/RiscVCpuLib/RiscVCpuLib.inf > create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c > create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.inf > create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.c > create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf > create mode 100644 RiscVPkg/Library/RiscVExceptionLib/CpuExceptionHandler.s > create mode 100644 RiscVPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf > create mode 100644 RiscVPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c > create mode 100644 RiscVPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.uni > create mode 100644 RiscVPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf > create mode 100644 RiscVPkg/Library/RiscVPlatformTempMemoryInitLibNull/RiscVPlatformTempMemoryInitLibNull.inf > create mode 100644 RiscVPkg/Library/RiscVPlatformTempMemoryInitLibNull/Riscv64/TempMemInit.s > create mode 100644 RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf > create mode 100644 RiscVPkg/Library/RiscVTimerLib/RiscVTimerLib.c > create mode 100644 RiscVPkg/Library/RiscVTimerLib/RiscVTimerLib.h > create mode 100644 RiscVPkg/RiscVPkg.dec > create mode 100644 RiscVPkg/RiscVPkg.uni > create mode 100644 RiscVPkg/RiscVPkgExtra.uni > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuDxe.c > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuDxe.h > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuDxe.inf > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuDxe.uni > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuDxeExtra.uni > create mode 100644 RiscVPkg/Universal/CpuDxe/CpuMp.h > create mode 100644 RiscVPkg/Universal/RealTimeClockRuntimeDxe/RealTimeClock.c > create mode 100644 RiscVPkg/Universal/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > create mode 100644 RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c > create mode 100644 RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.h > create mode 100644 RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf > create mode 100644 RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.uni > create mode 100644 RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxeExtra.uni > create mode 100644 RiscVPkg/opensbi/opensbi-HOWTO.txt > > -- > 2.7.4 > > > >