From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=WN7OGDa5; spf=pass (domain: linaro.org, ip: 209.85.221.66, mailfrom: leif.lindholm@linaro.org) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Tue, 17 Sep 2019 06:33:39 -0700 Received: by mail-wr1-f66.google.com with SMTP id n14so2303230wrw.9 for ; Tue, 17 Sep 2019 06:33:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=i0UBMo3TEEgf23dFXyqpg3j+hCx90opkoHFUZ2TbvtI=; b=WN7OGDa5yI+k9Hqr3dctjjOkVdvqT7aFCnLjZ/oV37TQDYiA0P4SGtODcPB31lMEvr SjT9UkkDgdED7pJ9PRXEHLLf0Rt9kQNbpC0MRklyKuK7oNT1IAecYSwKLfRziEuPo8eN x4lNbF03eaZm2A2+7oYu3FKVODkROMEn5UKCzdKlRFhXNT6pR2bxePr+7LAw+4FR1A0p +E7+YPBl3S4B5pRZmdHZEXQF6wiwb/PzSxc8K1bKyN7oJitpo9rha2eZ3rGKB3YEMLeO tDhv+5jQvjKPcOdTrv92cxyC20Q1PgZV35KXgM4LE99OBWHCvNGKhgDi3v1zcctVCbdU VGbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=i0UBMo3TEEgf23dFXyqpg3j+hCx90opkoHFUZ2TbvtI=; b=eOqxXJQ1pcCcFEET9bbitjPO20MlEFBYxVxNC9mE/PFxxg53h1+3W1pajDmso79Q9h unyJFvv6fLNEPg3DwYtCr3guWvGjPolo7oKyu3FKtAsMOQM88cLVD4jYGKfTt2UrS9Tt lXsXeTNV/v+vC4k9JKOdjX1JKslQJYDVoAUtZeg/+BrG5DXTDpZbpkluIA/WJf58tLDw hNkHjKRnIKYVcwdOJd7wDRsDUbeBUMNHe3W3c7vL9TWCE/2CGl948oo1ihK66zUq+DQT QD4/2fYSHYCKgHYqhoqmCJogkDzPMlk+CExihlCmpFYbvTDczar/QEiUDHDoSWiZHBnE ZQ5w== X-Gm-Message-State: APjAAAWWrP2TY+Selqa6l353W1VvNsLisv6uW6XSo5sKjGizI6iW/VLh jmqK3+x0k+xTXB8oJap5QWyjTQ== X-Google-Smtp-Source: APXvYqyWvZdy7Ih+LdY16lR+iTXvf2oJD19r03AALvmv7hPl3+slNtwS6tBEHNsjveNOuLJUkgubOQ== X-Received: by 2002:a5d:6242:: with SMTP id m2mr2846371wrv.261.1568727217519; Tue, 17 Sep 2019 06:33:37 -0700 (PDT) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id i93sm1356022wri.57.2019.09.17.06.33.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Sep 2019 06:33:36 -0700 (PDT) Date: Tue, 17 Sep 2019 14:33:35 +0100 From: "Leif Lindholm" To: Abner Chang Cc: devel@edk2.groups.io, Michael D Kinney , Liming Gao , Gilbert Chen Subject: Re: [PATCH] MdePkg:Include: Update SmBios header file Message-ID: <20190917133335.GD28454@bivouac.eciton.net> References: <1568701470-19480-1-git-send-email-abner.chang@hpe.com> MIME-Version: 1.0 In-Reply-To: <1568701470-19480-1-git-send-email-abner.chang@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Sep 17, 2019 at 02:24:30PM +0800, Abner Chang wrote: > Update SmBios header file to conform with SMBIOS v3.3.0. Ah, I note SMBIOS 3.3 has not yet been released - so this can not be merged in edk2 master at this point. I did not realise this when I requested you send the patch. However, you can carry this in your edk2-staging branch, and once the specification gets released we can take it into edk2. (After code review, a couple of minor comments below.) > The major update is to add definitions of SMBIOS Type 44h record. > > Signed-off-by: Abner Chang > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Leif Lindholm > Cc: Gilbert Chen > > --- > MdePkg/Include/IndustryStandard/SmBios.h | 74 +++++++++++++++++++++++++++++++- > 1 file changed, 72 insertions(+), 2 deletions(-) > > diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h > index f3b6f18..ebf0ceb 100644 > --- a/MdePkg/Include/IndustryStandard/SmBios.h > +++ b/MdePkg/Include/IndustryStandard/SmBios.h > @@ -3,6 +3,7 @@ > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
> +(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP
> SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF > > // > -// SMBIOS type macros which is according to SMBIOS 2.7 specification. > +// SMBIOS type macros which is according to SMBIOS 3.3.0 specification. > // > #define SMBIOS_TYPE_BIOS_INFORMATION 0 > #define SMBIOS_TYPE_SYSTEM_INFORMATION 1 > @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41 > #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42 > #define SMBIOS_TYPE_TPM_DEVICE 43 > +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44 > > /// > /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43. > @@ -727,7 +729,10 @@ typedef enum { > ProcessorFamilyMII = 0x012E, > ProcessorFamilyWinChip = 0x0140, > ProcessorFamilyDSP = 0x015E, > - ProcessorFamilyVideoProcessor = 0x01F4 > + ProcessorFamilyVideoProcessor = 0x01F4, > + ProcessorFamilyRiscvRV32 = 0x0200, ///< SMBIOS spec 3.3.0 added Please drop the "///< SMBIOS spec 3.3.0 added" comment. Here and below. > + ProcessorFamilyRiscVRV64 = 0x0201, ///< SMBIOS spec 3.3.0 added > + ProcessorFamilyRiscVRV128 = 0x0202 ///< SMBIOS spec 3.3.0 added No further comments from me (MdePkg maintainers may have some). / Leif > } PROCESSOR_FAMILY2_DATA; > > /// > @@ -857,6 +862,19 @@ typedef struct { > } PROCESSOR_FEATURE_FLAGS; > > typedef struct { > + UINT32 ProcessorReserved1 :1; > + UINT32 ProcessorUnknown :1; > + UINT32 Processor64BitCapble :1; > + UINT32 ProcessorMultiCore :1; > + UINT32 ProcessorHardwareThread :1; > + UINT32 ProcessorExecuteProtection :1; > + UINT32 ProcessorEnhancedVirtulization :1; > + UINT32 ProcessorPowerPerformanceCtrl :1; > + UINT32 Processor128bitCapble :1; > + UINT32 ProcessorReserved2 :7; > +} PROCESSOR_CHARACTERISTIC_FLAGS; > + > +typedef struct { > PROCESSOR_SIGNATURE Signature; > PROCESSOR_FEATURE_FLAGS FeatureFlags; > } PROCESSOR_ID_DATA; > @@ -2508,6 +2526,57 @@ typedef struct { > UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes > } SMBIOS_TABLE_TYPE42; > > + > +/// > +/// Processor Specific Block - Processor Architecture Type > +/// > +typedef enum{ > + ProcessorSpecificBlockArchTypeReserved = 0x00, > + ProcessorSpecificBlockArchTypeIa32 = 0x01, > + ProcessorSpecificBlockArchTypeX64 = 0x02, > + ProcessorSpecificBlockArchTypeItanium = 0x03, > + ProcessorSpecificBlockArchTypeAarch32 = 0x04, > + ProcessorSpecificBlockArchTypeAarch64 = 0x05, > + ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06, > + ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07, > + ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08 > +} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; > + > +/// > +/// Processor Specific Block is the standard container of processor-specific data. > +/// > +typedef struct { > + UINT8 Length; > + UINT8 ProcessorArchType; > + /// > + /// Below followed by Processor-specific data > + /// > + /// > +} PROCESSOR_SPECIFIC_BLOCK; > + > +/// > +/// Processor Additional Information(Type 44). > +/// > +/// The information in this structure defines the processor additional information in case > +/// SMBIOS type 4 is not sufficient to describe processor characteristics. > +/// The SMBIOS type 44 structure has a reference handle field to link back to the related > +/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the > +/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor, > +/// SMBIOS type 44 structures describe different core-specific information. > +/// > +/// SMBIOS type 44 defines the standard header for the processor-specific block, while the > +/// contents of processor-specific data are maintained by processor > +/// architecture workgroups or vendors in separate documents. > +/// > +typedef struct { > + SMBIOS_STRUCTURE Hdr; > + SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4 > + /// > + /// Below followed by Processor-specific block > + /// > + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock; > +} SMBIOS_TABLE_TYPE44; > + > /// > /// TPM Device (Type 43). > /// > @@ -2586,6 +2655,7 @@ typedef union { > SMBIOS_TABLE_TYPE41 *Type41; > SMBIOS_TABLE_TYPE42 *Type42; > SMBIOS_TABLE_TYPE43 *Type43; > + SMBIOS_TABLE_TYPE44 *Type44; > SMBIOS_TABLE_TYPE126 *Type126; > SMBIOS_TABLE_TYPE127 *Type127; > UINT8 *Raw; > -- > 2.7.4 >