From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=016589022d=gilbert.chen@hpe.com) Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Wed, 18 Sep 2019 20:51:35 -0700 Received: from pps.filterd (m0134422.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8J3pJbq032578 for ; Thu, 19 Sep 2019 03:51:34 GMT Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0b-002e3701.pphosted.com with ESMTP id 2v3vapdh7m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 19 Sep 2019 03:51:34 +0000 Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id D16B25C for ; Thu, 19 Sep 2019 03:51:33 +0000 (UTC) Received: from ARBDN0VRAE.asiapacific.hpqcorp.net (arbdn0vrae.asiapacific.hpqcorp.net [10.43.41.0]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 0D1CF45 for ; Thu, 19 Sep 2019 03:51:32 +0000 (UTC) From: "Gilbert Chen" To: devel@edk2.groups.io Subject: [plaforms/devel-riscv-v2 PATCHv2 00/14] Add SiFive U500 VC707 FPGA Platform Date: Thu, 19 Sep 2019 11:51:17 +0800 Message-Id: <20190919035131.4700-1-gilbert.chen@hpe.com> X-Mailer: git-send-email 2.12.0.windows.1 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-19_01:2019-09-18,2019-09-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 phishscore=0 clxscore=1015 mlxlogscore=999 suspectscore=15 malwarescore=0 priorityscore=1501 mlxscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909190033 "devel-riscv-v2" is a new branch created for reviewing code changes of SiFive U500 VC707 FPGA platform EDK2 port. Compare to old "devel-riscv" branch, the patches sent to "devel-riscv-v2" branch are made based on the most recent edk2/master. The corresponding patches of edk2 code changes were sent to edk2 devel mail list with [edk2-staging/RISC-V-V2] in patch message subject. Gilbert Chen (14): Silicon/SiFive: Initial version of SiFive silicon package Silicon/SiFive: Add library module of SiFive RISC-V cores platforms/RiscV: Initial version of RISC-V platform package RiscV/Include: Initial version of header files in RISC-V platform package RiscV/Library: Initial version of libraries introduced in RISC-V platform package RiscV/Universal: Initial version of common RISC-V SEC module RiscV/SiFive: Initial version of SiFive U500 platform package U500Pkg/Include: Header files of SiFive U500 platform U500Pkg/Library: Initial version of PlatformBootManagerLib U500Pkg/Library: Library instances of U500 platform library U500Pkg/RamFvbServiceruntimeDxe: FVB driver for EFI variable. U500Pkg/TimerDxe: Platform Timer DXE driver U500Pkg/PlatformPei: Platform initialization PEIM Platforms: Readme file updates Maintainers.txt | 9 + .../Library/FirmwareContextProcessorSpecificLib.h | 40 + .../FirmwareContextProcessorSpecificLib.c | 82 ++ .../FirmwareContextProcessorSpecificLib.inf | 33 + .../RealTimeClockLibNull/RealTimeClockLibNull.c | 204 ++++ .../RealTimeClockLibNull/RealTimeClockLibNull.inf | 30 + Platform/RiscV/Readme.md | 89 ++ Platform/RiscV/RiscVPlatformPkg.dec | 72 ++ Platform/RiscV/RiscVPlatformPkg.uni | 15 + Platform/RiscV/RiscVPlatformPkgExtra.uni | 12 + .../SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h | 51 + Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h | 19 + .../OpenSbiPlatformLib/OpenSbiPlatformLib.inf | 47 + .../U500Pkg/Library/OpenSbiPlatformLib/platform.c | 214 ++++ .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 195 ++++ .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 58 + .../Library/PlatformBootManagerLib/MemoryTest.c | 682 ++++++++++++ .../PlatformBootManagerLib/PlatformBootManager.c | 274 +++++ .../PlatformBootManagerLib/PlatformBootManager.h | 135 +++ .../PlatformBootManagerLib.inf | 63 ++ .../Library/PlatformBootManagerLib/PlatformData.c | 49 + .../Library/PlatformBootManagerLib/Strings.uni | 28 + .../RiscVPlatformTimerLib/RiscVPlatformTimerLib.S | 48 + .../RiscVPlatformTimerLib.inf | 39 + .../U500Pkg/Library/SerialIoLib/SerialIoLib.inf | 31 + .../U500Pkg/Library/SerialIoLib/SerialPortLib.c | 241 +++++ .../Library/SerialIoLib/U500SerialPortLib.uni | 16 + Platform/RiscV/SiFive/U500Pkg/Readme.md | 62 ++ Platform/RiscV/SiFive/U500Pkg/U500.dec | 34 + Platform/RiscV/SiFive/U500Pkg/U500.dsc | 549 ++++++++++ Platform/RiscV/SiFive/U500Pkg/U500.fdf | 335 ++++++ Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc | 52 + Platform/RiscV/SiFive/U500Pkg/U500.uni | 13 + Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni | 12 + .../Dxe/RamFvbServicesRuntimeDxe/FvbInfo.c | 127 +++ .../FvbServicesRuntimeDxe.inf | 81 ++ .../Dxe/RamFvbServicesRuntimeDxe/FwBlockService.c | 1123 ++++++++++++++++++++ .../Dxe/RamFvbServicesRuntimeDxe/FwBlockService.h | 187 ++++ .../RamFvbServicesRuntimeDxe/FwBlockServiceDxe.c | 151 +++ .../Dxe/RamFvbServicesRuntimeDxe/RamFlash.c | 144 +++ .../Dxe/RamFvbServicesRuntimeDxe/RamFlash.h | 85 ++ .../Dxe/RamFvbServicesRuntimeDxe/RamFlashDxe.c | 20 + .../SiFive/U500Pkg/Universal/Dxe/TimerDxe/Timer.c | 311 ++++++ .../SiFive/U500Pkg/Universal/Dxe/TimerDxe/Timer.h | 174 +++ .../U500Pkg/Universal/Dxe/TimerDxe/Timer.uni | 14 + .../U500Pkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 48 + .../U500Pkg/Universal/Dxe/TimerDxe/TimerExtra.uni | 12 + .../SiFive/U500Pkg/Universal/Pei/PlatformPei/Fv.c | 49 + .../U500Pkg/Universal/Pei/PlatformPei/MemDetect.c | 74 ++ .../U500Pkg/Universal/Pei/PlatformPei/Platform.c | 313 ++++++ .../U500Pkg/Universal/Pei/PlatformPei/Platform.h | 92 ++ .../Universal/Pei/PlatformPei/PlatformPei.inf | 75 ++ Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc | 78 ++ Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S | 438 ++++++++ Platform/RiscV/Universal/Sec/SecMain.c | 524 +++++++++ Platform/RiscV/Universal/Sec/SecMain.h | 57 + Platform/RiscV/Universal/Sec/SecMain.inf | 75 ++ Readme.md | 11 + .../E51/Library/PeiCoreInfoHobLib/CoreInfoHob.c | 242 +++++ .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 51 + Silicon/SiFive/Include/Library/SiFiveE51.h | 60 ++ Silicon/SiFive/Include/Library/SiFiveU54.h | 60 ++ .../SiFive/Include/Library/SiFiveU54MCCoreplex.h | 55 + Silicon/SiFive/SiFive.dec | 39 + .../U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c | 294 +++++ .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 51 + .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 185 ++++ .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 50 + 68 files changed, 9183 insertions(+) create mode 100644 Platform/RiscV/Include/Library/FirmwareContextProcessorSpecificLib.h create mode 100644 Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c create mode 100644 Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf create mode 100644 Platform/RiscV/Library/RealTimeClockLibNull/RealTimeClockLibNull.c create mode 100644 Platform/RiscV/Library/RealTimeClockLibNull/RealTimeClockLibNull.inf create mode 100644 Platform/RiscV/Readme.md create mode 100644 Platform/RiscV/RiscVPlatformPkg.dec create mode 100644 Platform/RiscV/RiscVPlatformPkg.uni create mode 100644 Platform/RiscV/RiscVPlatformPkgExtra.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/OpenSbiPlatformLib/OpenSbiPlatformLib.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/OpenSbiPlatformLib/platform.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/MemoryTest.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformData.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/Strings.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.S create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/SerialIoLib/SerialIoLib.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/SerialIoLib/SerialPortLib.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/SerialIoLib/U500SerialPortLib.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Readme.md create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.dec create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.dsc create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.fdf create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbInfo.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FwBlockService.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FwBlockService.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FwBlockServiceDxe.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/RamFlash.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/RamFlash.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/RamFlashDxe.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/Timer.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/Timer.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/Timer.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/TimerDxe.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/TimerExtra.uni create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/Fv.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/MemDetect.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/Platform.c create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/Platform.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/PlatformPei.inf create mode 100644 Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc create mode 100644 Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S create mode 100644 Platform/RiscV/Universal/Sec/SecMain.c create mode 100644 Platform/RiscV/Universal/Sec/SecMain.h create mode 100644 Platform/RiscV/Universal/Sec/SecMain.inf create mode 100644 Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/CoreInfoHob.c create mode 100644 Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf create mode 100644 Silicon/SiFive/Include/Library/SiFiveE51.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h create mode 100644 Silicon/SiFive/SiFive.dec create mode 100644 Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c create mode 100644 Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf create mode 100644 Silicon/SiFive/U54MCCoreplex/Library/PeiCoreInfoHobLib/CoreInfoHob.c create mode 100644 Silicon/SiFive/U54MCCoreplex/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf -- 2.12.0.windows.1