[plaforms/devel-riscv-v2 PATCHv2 03/14] platforms/RiscV: Initial version of RISC-V platform package

["Gilbert Chen" <gilbert.chen@hpe.com>]

Initial version of RISC-V platform package which provides the common
 libraries, drivers, PCD and etc. for RISC-V platform development.

Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
---
 Platform/RiscV/Readme.md                 | 89 ++++++++++++++++++++++++++++++++
 Platform/RiscV/RiscVPlatformPkg.dec      | 72 ++++++++++++++++++++++++++
 Platform/RiscV/RiscVPlatformPkg.uni      | 15 ++++++
 Platform/RiscV/RiscVPlatformPkgExtra.uni | 12 +++++
 4 files changed, 188 insertions(+)
 create mode 100644 Platform/RiscV/Readme.md
 create mode 100644 Platform/RiscV/RiscVPlatformPkg.dec
 create mode 100644 Platform/RiscV/RiscVPlatformPkg.uni
 create mode 100644 Platform/RiscV/RiscVPlatformPkgExtra.uni

diff --git a/Platform/RiscV/Readme.md b/Platform/RiscV/Readme.md
new file mode 100644
index 00000000..277782e3
--- /dev/null
+++ b/Platform/RiscV/Readme.md
@@ -0,0 +1,89 @@
+# Introduction
+
+## EDK2 RISC-V Platform Package
+RISC-V platform package provides the generic and common modules for RISC-V platforms. RISC-V platform package could include RiscPlatformPkg.dec to use the common drivers, libraries, definitions, PCDs and etc. for the platform development.
+
+## EDK2 RISC-V Platforms
+RISC-V platform is created and maintained by RISC-V platform vendors. The directory of RISC-V platform should be created under Platform/RiscV. Vendor should create the folder under Platform/RiscV and name it using vendor name, under the vendor folder is the platform folder named by platform model name, code name or etc. (e.g. Platform/RiscV/SiFive/U500Pkg)
+
+## Build EDK2 RISC-V Platforms
+RISC-V platform package should provide EDK2 metafiles under RISC-V platform package folder (Platform/RiscV/{Vendor}/{Platform}). Build RISC-V platform package against edk2 and follow the build guidence mentioned in Readme.md under below link.<br>
+https://github.com/tianocore/edk2-platforms<br>
+
+### Download the sources ###
+```
+git clone https://github.com/tianocore/edk2-staging.git
+# Checkout RISC-V-V2 branch
+git clone https://github.com/tianocore/edk2-platforms.git
+# Checkout devel-riscv-v2 branch
+git clone https://github.com/tianocore/edk2-non-osi.git
+```
+
+### Requirements
+Build EDK2 RISC-V platform requires GCC RISC-V toolchain. Refer to https://github.com/riscv/riscv-gnu-toolchain for the details.
+The commit ID 64879b24 is verified to build RISC-V EDK2 platform and boot to EFI SHELL successfully.
+
+### EDK2 project
+Currently, the EDK2 RISC-V platform can only build with edk2 project in **edk2-staging/RISC-V-V2** branch. The build architecture whcih is supported and verified so far is "RISCV64". The verified RISC-V toolchain is https://github.com/riscv/riscv-gnu-toolchain @64879b24, toolchain tag is "GCCRISCV" declared in tools_def.txt<br>
+
+### Linux Build Instructions
+You can build the RISC-V platform using below script, <br>
+`build -a RISCV64 -p Platform/{Vendor}/{Platform}/{Platform}.dsc -t GCCRISCV`
+
+Or modify target.txt to set up your build parameters.
+
+## RISC-V Platform PCD settings
+### EDK2 Firmware Volume Settings
+EDK2 Firmware volume related PCDs which declared in platform FDF file.
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdRiscVSecFvBase| The base address of SEC Firmware Volume|
+|PcdRiscVSecFvSize| The size of SEC Firmware Volume|
+|PcdRiscVPeiFvBase| The base address of SEC Firmware Volume|
+|PcdRiscVPeiFvSize| The size of SEC Firmware Volume|
+|PcdRiscVDxeFvBase| The base address of SEC Firmware Volume|
+|PcdRiscVDxeFvSize| The size of SEC Firmware Volume|
+
+### EDK2 EFI Variable Region Settings
+The PCD settings regard to EFI Variable
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdVariableFdBaseAddress| The EFI variable firmware device base address|
+|PcdVariableFdSize| The EFI variable firmware device size|
+|PcdVariableFdBlockSize| The block size of EFI variable firmware device|
+|PcdPlatformFlashNvStorageVariableBase| EFI variable base address within firmware device|
+|PcdPlatformFlashNvStorageFtwWorkingBase| The base address of EFI variable fault tolerance worksapce (FTW) within firmware device|
+|PcdPlatformFlashNvStorageFtwSpareBase| The base address of EFI variable spare FTW within firmware device|
+
+### RISC-V Physical Memory Protection (PMP) Region Settings
+Below PCDs could be set in platform FDF file.
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdFwStartAddress| The starting address of firmware region to protected by PMP|
+|PcdFwEndAddress| The ending address of firmware region to protected by PMP|
+
+### RISC-V Processor HART Settings
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdHartCount| Number of RISC-V HARTs, the value is processor-implementation specific|
+|PcdBootHartId| The ID of RISC-V HART to execute main fimrware code and boot system to OS|
+
+### RISC-V OpenSBI Settings
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdScratchRamBase| The base address of OpenSBI scratch buffer for all RISC-V HARTs|
+|PcdScratchRamSize| The total size of OpenSBI scratch buffer for all RISC-V HARTs|
+|PcdOpenSbiStackSize| The size of initial stack of each RISC-V HART for booting system use OpenSBI|
+|PcdTemporaryRamBase| The base address of temporary memory for PEI phase|
+|PcdTemporaryRamSize| The temporary memory size for PEI phase|
+
+## Supported Operating Systems
+Only support to boot to EFI Shell so far
+
+## Known Issues and Limitations
+Only RISC-V RV64 is verified
diff --git a/Platform/RiscV/RiscVPlatformPkg.dec b/Platform/RiscV/RiscVPlatformPkg.dec
new file mode 100644
index 00000000..3ce16bfc
--- /dev/null
+++ b/Platform/RiscV/RiscVPlatformPkg.dec
@@ -0,0 +1,72 @@
+## @file  RiscVPlatformPkg.dec
+# This Package provides UEFI RISC-V platform modules and libraries.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION              = 0x00010005
+  PACKAGE_NAME                   = RiscPlatformPkg
+  PACKAGE_UNI_FILE               = RiscPlatformPkg.uni
+  PACKAGE_GUID                   = 6A67AF99-4592-40F8-B6BE-62BCA10DA1EC
+  PACKAGE_VERSION                = 1.0
+
+[Includes]
+  Include
+
+[LibraryClasses]
+
+[LibraryClasses.RISCV32, LibraryClasses.RISCV64]
+
+[Guids]
+  gUefiRiscVPlatformPkgTokenSpaceGuid  = {0x6A67AF99, 0x4592, 0x40F8, { 0xB6, 0xBE, 0x62, 0xBC, 0xA1, 0x0D, 0xA1, 0xEC}}
+
+[PcdsFixedAtBuild]
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvBase|0x0|UINT32|0x00001000
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvSize|0x0|UINT32|0x00001001
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase|0x0|UINT32|0x00001002
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001003
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001004
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001005
+
+#
+# Definition of EFI Variable region
+#
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBaseAddress|0|UINT32|0x00001010
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdSize|0|UINT32|0x00001011
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBlockSize|0|UINT32|0x00001012
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageVariableBase|0|UINT32|0x00001013
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwWorkingBase|0|UINT32|0x00001014
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwSpareBase|0|UINT32|0x00001015
+#
+# Firmware region which is protected by PMP.
+#
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwBlockSize|0|UINT32|0x00001020
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwStartAddress|0|UINT32|0x00001021
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress|0|UINT32|0x00001022
+#
+# Definition of RISC-V Hart
+#
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount|0|UINT32|0x00001023
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId|0|UINT32|0x00001024
+#
+# Definitions for OpenSbi
+#
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase|0|UINT32|0x00001025
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize|0|UINT32|0x00001026
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize|0|UINT32|0x00001027
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase|0|UINT32|0x00001028
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001029
+
+[PcdsPatchableInModule]
+
+[PcdsFeatureFlag]
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable|FALSE|BOOLEAN|0x00001006
+
+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  RiscVPlatformPkgExtra.uni
diff --git a/Platform/RiscV/RiscVPlatformPkg.uni b/Platform/RiscV/RiscVPlatformPkg.uni
new file mode 100644
index 00000000..deb91fa1
--- /dev/null
+++ b/Platform/RiscV/RiscVPlatformPkg.uni
@@ -0,0 +1,15 @@
+// /** @file
+// RISC-V Package Localized Strings and Content.
+//
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_PACKAGE_ABSTRACT            #language en-US "Provides UEFI compatible RISC-V platform modules and libraries"
+
+#string STR_PACKAGE_DESCRIPTION         #language en-US "This Package provides UEFI compatible RISC-V platform modules and libraries."
+
+
diff --git a/Platform/RiscV/RiscVPlatformPkgExtra.uni b/Platform/RiscV/RiscVPlatformPkgExtra.uni
new file mode 100644
index 00000000..98d81aed
--- /dev/null
+++ b/Platform/RiscV/RiscVPlatformPkgExtra.uni
@@ -0,0 +1,12 @@
+// /** @file
+// RISC-V Package Localized Strings and Content.
+//
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_PROPERTIES_PACKAGE_NAME
+#language en-US
+"RiscV platform package"
-- 
2.12.0.windows.1