From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=016589022d=gilbert.chen@hpe.com) Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Wed, 18 Sep 2019 20:51:45 -0700 Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8J3pKup021201 for ; Thu, 19 Sep 2019 03:51:44 GMT Received: from g9t5009.houston.hpe.com (g9t5009.houston.hpe.com [15.241.48.73]) by mx0a-002e3701.pphosted.com with ESMTP id 2v3vaqnkcx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 19 Sep 2019 03:51:44 +0000 Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g9t5009.houston.hpe.com (Postfix) with ESMTP id 4690951 for ; Thu, 19 Sep 2019 03:51:44 +0000 (UTC) Received: from ARBDN0VRAE.asiapacific.hpqcorp.net (arbdn0vrae.asiapacific.hpqcorp.net [10.43.41.0]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 767C545 for ; Thu, 19 Sep 2019 03:51:43 +0000 (UTC) From: "Gilbert Chen" To: devel@edk2.groups.io Subject: [plaforms/devel-riscv-v2 PATCHv2 08/14] U500Pkg/Include: Header files of SiFive U500 platform Date: Thu, 19 Sep 2019 11:51:25 +0800 Message-Id: <20190919035131.4700-9-gilbert.chen@hpe.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20190919035131.4700-1-gilbert.chen@hpe.com> References: <20190919035131.4700-1-gilbert.chen@hpe.com> X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-19_01:2019-09-18,2019-09-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 mlxscore=0 suspectscore=13 priorityscore=1501 bulkscore=0 mlxlogscore=988 adultscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909190033 The initial header file commit for SiFive U5-MC Coreplex and U500 Core Local interrupt definitions. Signed-off-by: Gilbert Chen --- .../SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h | 51 ++++++++++++++++++++++ Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h | 19 ++++++++ 2 files changed, 70 insertions(+) create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h new file mode 100644 index 00000000..9968159c --- /dev/null +++ b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h @@ -0,0 +1,51 @@ +/** @file + SiFive U54 Coreplex library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SIFIVE_U5MC_COREPLEX_H_ +#define _SIFIVE_U5MC_COREPLEX_H_ + +#include + +#include +#include + +#define SIFIVE_U5MC_COREPLEX_MC_HART_ID 0 + +/** + Build up U5MC coreplex processor core-specific information. + + @param UniqueId U5MC unique ID. + + @return EFI_STATUS + +**/ +EFI_STATUS +EFIAPI +CreateU5MCCoreplexProcessorSpecificDataHob ( + IN UINTN UniqueId + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DXE driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this core. + @param SmbiosDataHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_HOB. The pointers + maintained in this structure is only valid before memory is discovered. + Access to those pointers after memory is installed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU5MCProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosDataHobPtr + ); +#endif diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h new file mode 100644 index 00000000..a8c9ae15 --- /dev/null +++ b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h @@ -0,0 +1,19 @@ +/** @file + RISC-V Timer Architectural definition for U500 platform. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _U500_H_ +#define _U500_H_ + +#define CLINT_REG_MTIME 0x0200BFF8 +#define CLINT_REG_MTIMECMP0 0x02004000 +#define CLINT_REG_MTIMECMP1 0x02004008 +#define CLINT_REG_MTIMECMP2 0x02004010 +#define CLINT_REG_MTIMECMP3 0x02004018 +#define CLINT_REG_MTIMECMP4 0x02004020 + +#endif -- 2.12.0.windows.1