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From: "Ni, Ray" <ray.ni@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH 1/2] UefiCpuPkg/PiSmmCpu: Remove hard code when getting physical line size
Date: Thu, 26 Sep 2019 08:09:03 +0800	[thread overview]
Message-ID: <20190926000904.187532-2-ray.ni@intel.com> (raw)
In-Reply-To: <20190926000904.187532-1-ray.ni@intel.com>

The code replaces the hard code with macros defined in
MdePkg\Include\Register\Intel\CpuId.h.

No functionality impact.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index e5c4788c13..b8e95bf6ed 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -151,30 +151,28 @@ GetSubEntriesNum (
   @return the maximum support address.
 **/
 UINT8
-CalculateMaximumSupportAddress (
+GetPhysicalAddressBits (
   VOID
   )
 {
-  UINT32                                        RegEax;
-  UINT8                                         PhysicalAddressBits;
-  VOID                                          *Hob;
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX              VirPhyAddressSize;
+  UINT32                                      MaxExtendedFunctionId;
+  VOID                                        *Hob;
 
   //
   // Get physical address bits supported.
   //
   Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
   if (Hob != NULL) {
-    PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
+    return ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
   } else {
-    AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-    if (RegEax >= 0x80000008) {
-      AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-      PhysicalAddressBits = (UINT8) RegEax;
-    } else {
-      PhysicalAddressBits = 36;
+    AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunctionId, NULL, NULL, NULL);
+    if (MaxExtendedFunctionId < CPUID_VIR_PHY_ADDRESS_SIZE) {
+      return 36;
     }
+    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
+    return (UINT8) VirPhyAddressSize.Bits.PhysicalAddressBits;
   }
-  return PhysicalAddressBits;
 }
 
 /**
@@ -354,7 +352,7 @@ SmmInitPageTable (
   mCpuSmmRestrictedMemoryAccess = PcdGetBool (PcdCpuSmmRestrictedMemoryAccess);
   m1GPageTableSupport           = Is1GPageSupport ();
   m5LevelPagingNeeded           = Is5LevelPagingNeeded ();
-  mPhysicalAddressBits          = CalculateMaximumSupportAddress ();
+  mPhysicalAddressBits          = GetPhysicalAddressBits ();
   PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1);
   DEBUG ((DEBUG_INFO, "5LevelPaging Needed             - %d\n", m5LevelPagingNeeded));
   DEBUG ((DEBUG_INFO, "1GPageTable Support             - %d\n", m1GPageTableSupport));
-- 
2.21.0.windows.1


  reply	other threads:[~2019-09-26  0:10 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-26  0:09 [PATCH 0/2] Honor the physical address size in CpuInfo HOB Ni, Ray
2019-09-26  0:09 ` Ni, Ray [this message]
2019-09-26 17:54   ` [PATCH 1/2] UefiCpuPkg/PiSmmCpu: Remove hard code when getting physical line size Laszlo Ersek
2019-09-26 18:44     ` [edk2-devel] " Ni, Ray
2019-09-26  0:09 ` [PATCH 2/2] UefiCpuPkg/PiSmmCpuDxe: Honor the physical address size in CpuInfo HOB Ni, Ray
2019-09-26 18:01   ` Laszlo Ersek
2019-09-26 18:43     ` Ni, Ray

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