Re: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 08/14] U500Pkg/Include: Header files of SiFive U500 platform

["Leif Lindholm" <leif.lindholm@linaro.org>]

On Thu, Sep 19, 2019 at 11:51:25AM +0800, Gilbert Chen wrote:
> The initial header file commit for SiFive U5-MC Coreplex and U500 Core
>  Local interrupt definitions.

There is a generic issue here, and not just with this patch:
It is being added *after* the U500 platform, which depends on this.
Please reorder the set so that all of the prerequisites for the
platforms come before the platform .dsc.

Also, please add these files together with the implementations of the
functions declared here.
SiFive/U500Pkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c

> Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
> ---
>  .../SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h    | 51 ++++++++++++++++++++++
>  Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h  | 19 ++++++++
>  2 files changed, 70 insertions(+)
>  create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
>  create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h
> 
> diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
> new file mode 100644
> index 00000000..9968159c
> --- /dev/null
> +++ b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
> @@ -0,0 +1,51 @@
> +/** @file
> +  SiFive U54 Coreplex library definitions.
> +
> +  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +#ifndef _SIFIVE_U5MC_COREPLEX_H_
> +#define _SIFIVE_U5MC_COREPLEX_H_

Please drop leading _.

> +
> +#include <PiPei.h>
> +
> +#include <SmbiosProcessorSpecificData.h>
> +#include <ProcessorSpecificDataHob.h>
> +
> +#define SIFIVE_U5MC_COREPLEX_MC_HART_ID     0
> +
> +/**
> +  Build up U5MC coreplex processor core-specific information.
> +
> +  @param  UniqueId      U5MC unique ID.
> +
> +  @return EFI_STATUS
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CreateU5MCCoreplexProcessorSpecificDataHob (
> +  IN UINTN UniqueId
> +  );
> +
> +/**
> +  Function to build processor related SMBIOS information. RISC-V SMBIOS DXE driver collect
> +  this information and build SMBIOS Type4 and Type7 record.
> +
> +  @param  ProcessorUid        Unique ID of pysical processor which owns this core.
> +  @param  SmbiosDataHobPtr    Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_HOB. The pointers
> +                              maintained in this structure is only valid before memory is discovered.
> +                              Access to those pointers after memory is installed will cause unexpected issues.
> +
> +  @return EFI_SUCCESS     The PEIM initialized successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CreateU5MCProcessorSmbiosDataHob (
> +  IN UINTN     ProcessorUid,
> +  OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosDataHobPtr
> +  );
> +#endif
> diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h
> new file mode 100644
> index 00000000..a8c9ae15
> --- /dev/null
> +++ b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h
> @@ -0,0 +1,19 @@
> +/** @file
> +  RISC-V Timer Architectural definition for U500 platform.
> +
> +  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +#ifndef _U500_H_
> +#define _U500_H_

Please drop leading _.

/
    Leif

> +
> +#define CLINT_REG_MTIME     0x0200BFF8
> +#define CLINT_REG_MTIMECMP0 0x02004000
> +#define CLINT_REG_MTIMECMP1 0x02004008
> +#define CLINT_REG_MTIMECMP2 0x02004010
> +#define CLINT_REG_MTIMECMP3 0x02004018
> +#define CLINT_REG_MTIMECMP4 0x02004020
> +
> +#endif
> -- 
> 2.12.0.windows.1
> 
> 
> 
>