From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=sjZ0sZUd; spf=pass (domain: linaro.org, ip: 209.85.221.66, mailfrom: leif.lindholm@linaro.org) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Wed, 02 Oct 2019 14:00:36 -0700 Received: by mail-wr1-f66.google.com with SMTP id r3so544315wrj.6 for ; Wed, 02 Oct 2019 14:00:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=TTQA7TgfW+oJjVHRbQ8HqAusoToLkc/zDGrKfL7gNKs=; b=sjZ0sZUdoCk2MIHqEFNKHgmzlYCZT7JrvOESI631mJ2uWCod9T+UxdJhwvRI+I7cG7 sfKKDQ+DnjAcZ1f7wIBj3jCajW4OZSeGstX19ZtS2yXH565yexuLv1HHUT5T7pp0hmbl g06FQ1uAWUd9j7xtyewagfPSmjYfs6XbIfMwU5uu8sTg1ctyPqT7sEktFfzKDxHDhXwf icvAChvdfbnuzUnFR5lM4yu97UTXe4TIyQr55JuOErnux05vVNFq2NS9+CnlEuIVxJXV A4dtRJHbngijJ0CLStQd7YuXjaQxWHcwqoS5LqJvvnudzPl45pFBeg+oN+hi43ZxZnEd wrgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=TTQA7TgfW+oJjVHRbQ8HqAusoToLkc/zDGrKfL7gNKs=; b=hDmyFg7LUVm2oCNrlwplQoywM6TTpnwVf/60Qytv3UiwZ4ndX8pzNuU+akxPjxUw6+ FMQht7UiFJZbjgf6bZqhvXjdWzZKf8MLS3qpLIGj4WmOnCnELZJEZPMbH+VMkcpcQJVg nFsULl701ptEIr5yZKFHaCbT0kyiSPCxoBQmAgKvmhlmlXFrUxVNXbugwvrCtVqDX54I VEUpYDwN2Up77lpkBmFZBGezgupxzAVCOZYx0DvhvTLiLZRafBrgmabC/wYB52daqgn6 4VsRj3gllf5INb5BponyPmXnOMUL0Bk3GIU4WbxRY9FyX5MI4pPnb8LPLaWuXp0f5CM0 7pZQ== X-Gm-Message-State: APjAAAUsgjH4382bonSLr6HLhysy8MBXd1ZRZALiQeB5WnYD60w6JX2Y ctuPISo6rwP93PM0RYfdQ5d5Z5lj6RI= X-Google-Smtp-Source: APXvYqwaXDnVwA5A/JN+taq4dhzFnHO4yD7ODcKQ+o8BQzwC91pOwzjkCbKox0QAUxUMbkjBEjI99w== X-Received: by 2002:a5d:628f:: with SMTP id k15mr4135688wru.124.1570050033927; Wed, 02 Oct 2019 14:00:33 -0700 (PDT) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id n8sm507819wma.7.2019.10.02.14.00.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Oct 2019 14:00:33 -0700 (PDT) Date: Wed, 2 Oct 2019 22:00:31 +0100 From: "Leif Lindholm" To: devel@edk2.groups.io, gilbert.chen@hpe.com Cc: Palmer Dabbelt Subject: Re: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 08/14] U500Pkg/Include: Header files of SiFive U500 platform Message-ID: <20191002210031.GH25504@bivouac.eciton.net> References: <20190919035131.4700-1-gilbert.chen@hpe.com> <20190919035131.4700-9-gilbert.chen@hpe.com> MIME-Version: 1.0 In-Reply-To: <20190919035131.4700-9-gilbert.chen@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Sep 19, 2019 at 11:51:25AM +0800, Gilbert Chen wrote: > The initial header file commit for SiFive U5-MC Coreplex and U500 Core > Local interrupt definitions. There is a generic issue here, and not just with this patch: It is being added *after* the U500 platform, which depends on this. Please reorder the set so that all of the prerequisites for the platforms come before the platform .dsc. Also, please add these files together with the implementations of the functions declared here. SiFive/U500Pkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c > Signed-off-by: Gilbert Chen > --- > .../SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h | 51 ++++++++++++++++++++++ > Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h | 19 ++++++++ > 2 files changed, 70 insertions(+) > create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h > create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h > > diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h > new file mode 100644 > index 00000000..9968159c > --- /dev/null > +++ b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h > @@ -0,0 +1,51 @@ > +/** @file > + SiFive U54 Coreplex library definitions. > + > + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > +#ifndef _SIFIVE_U5MC_COREPLEX_H_ > +#define _SIFIVE_U5MC_COREPLEX_H_ Please drop leading _. > + > +#include > + > +#include > +#include > + > +#define SIFIVE_U5MC_COREPLEX_MC_HART_ID 0 > + > +/** > + Build up U5MC coreplex processor core-specific information. > + > + @param UniqueId U5MC unique ID. > + > + @return EFI_STATUS > + > +**/ > +EFI_STATUS > +EFIAPI > +CreateU5MCCoreplexProcessorSpecificDataHob ( > + IN UINTN UniqueId > + ); > + > +/** > + Function to build processor related SMBIOS information. RISC-V SMBIOS DXE driver collect > + this information and build SMBIOS Type4 and Type7 record. > + > + @param ProcessorUid Unique ID of pysical processor which owns this core. > + @param SmbiosDataHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_HOB. The pointers > + maintained in this structure is only valid before memory is discovered. > + Access to those pointers after memory is installed will cause unexpected issues. > + > + @return EFI_SUCCESS The PEIM initialized successfully. > + > +**/ > +EFI_STATUS > +EFIAPI > +CreateU5MCProcessorSmbiosDataHob ( > + IN UINTN ProcessorUid, > + OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosDataHobPtr > + ); > +#endif > diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h > new file mode 100644 > index 00000000..a8c9ae15 > --- /dev/null > +++ b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h > @@ -0,0 +1,19 @@ > +/** @file > + RISC-V Timer Architectural definition for U500 platform. > + > + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > +#ifndef _U500_H_ > +#define _U500_H_ Please drop leading _. / Leif > + > +#define CLINT_REG_MTIME 0x0200BFF8 > +#define CLINT_REG_MTIMECMP0 0x02004000 > +#define CLINT_REG_MTIMECMP1 0x02004008 > +#define CLINT_REG_MTIMECMP2 0x02004010 > +#define CLINT_REG_MTIMECMP3 0x02004018 > +#define CLINT_REG_MTIMECMP4 0x02004020 > + > +#endif > -- > 2.12.0.windows.1 > > > >