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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id g3sm6717557wro.14.2019.10.03.10.45.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2019 10:45:18 -0700 (PDT) Date: Thu, 3 Oct 2019 18:45:16 +0100 From: "Leif Lindholm" To: devel@edk2.groups.io, gilbert.chen@hpe.com Cc: Palmer Dabbelt Subject: Re: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 14/14] Platforms: Readme file updates Message-ID: <20191003174516.GS25504@bivouac.eciton.net> References: <20190919035131.4700-1-gilbert.chen@hpe.com> <20190919035131.4700-15-gilbert.chen@hpe.com> MIME-Version: 1.0 In-Reply-To: <20190919035131.4700-15-gilbert.chen@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Sep 19, 2019 at 11:51:31AM +0800, Gilbert Chen wrote: > Update Readme.md and Maintainers.txt for RISV-V platforms. > > Signed-off-by: Gilbert Chen > --- > Maintainers.txt | 9 +++++++++ > Readme.md | 11 +++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/Maintainers.txt b/Maintainers.txt > index 876ae561..c494c9d5 100644 > --- a/Maintainers.txt > +++ b/Maintainers.txt > @@ -108,6 +108,11 @@ R: Marcin Wojtas > Platform/SolidRun/Armada80x0McBin > R: Marcin Wojtas > > +Platform/RiscV > +Platform/RiscV/SiFive/U500Pkg Since we're on a -devel branch anyway ... could you turn these into F: entries even though we haven't converted edk2-platforms/Maintainers.txt to the new format yet? > +R: Abner Chang > +R: Gilbert Chen > + > Silicon > M: Ard Biesheuvel > M: Leif Lindholm > @@ -151,3 +156,7 @@ M: Liming Gao > > Silicon/Marvell > R: Marcin Wojtas > + > +Silicon/SiFive Same here. / Leif > +R: Abner Chang > +R: Gilbert Chen > diff --git a/Readme.md b/Readme.md > index 63e59f60..0395e20a 100644 > --- a/Readme.md > +++ b/Readme.md > @@ -52,6 +52,7 @@ ARM | arm-linux-gnueabihf- > IA32 | i?86-linux-gnu-* _or_ x86_64-linux-gnu- > IPF | ia64-linux-gnu > X64 | x86_64-linux-gnu- > +RISCV64 | riscv64-unknown-elf- > > \* i386, i486, i586 or i686 > > @@ -62,6 +63,12 @@ and [arm-linux-gnueabihf](https://releases.linaro.org/components/toolchain/binar > compiled to run on x86_64/i686 Linux and i686 Windows. Some Linux distributions > provide their own packaged cross-toolchains. > > +### GCC for RISC-V > +RISC-V open source community provides GCC toolchains for > +[riscv64-unknown-elf](https://github.com/riscv/riscv-gnu-toolchain) > +compiled to run on x86 Linux. The commit ID 64879b24 is verified to build RISC-V EDK2 platform and boot to EFI > +SHELL successfully. > + > ### clang > Clang does not require separate cross compilers, but it does need a > target-specific binutils. These are included with any prepackaged GCC toolchain > @@ -243,6 +250,10 @@ For more information, see the > ## Raspberry Pi > * [Pi 3](Platform/RaspberryPi/RPi3) > > +## RISC-V > +### SiFive > +* [Freedom U500 VC707 FPGA](Platform/RiscV/SiFive/U500Pkg) > + > ## Socionext > * [SynQuacer](Platform/Socionext/DeveloperBox) > > -- > 2.12.0.windows.1 > > > >