[edk2-platforms][PATCH V1 03/17] KabylakeOpenBoardPkg/KabylakeRvp3: DSC cleanup

["Kubacki, Michael A" <michael.a.kubacki@intel.com>]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2242

This change refactors OpenBoardPkg.dsc and OpenBoardPkgPcd.dsc to
consolidate redundant sections and better group file content to
improve maintainability and readability.

The same pattern made in this change for KabylakeRvp3 is being
applied to all existing board packages in Platform/Intel to improve
overall consistency.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com>
---
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc    | 521 ++++++++++---------
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 547 ++++++++++----------
 2 files changed, 539 insertions(+), 529 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index a3378d3c5d..efc4c2dca8 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -1,5 +1,5 @@
 ## @file
-#  Platform description.
+#  The main build description file for the KabylakeRvp3 board.
 #
 # Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
 #
@@ -7,11 +7,6 @@
 #
 ##
 [Defines]
-  #
-  # Set platform specific package/folder name, same as passed from PREBUILD script.
-  # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package build folder
-  # DEFINE only takes effect at R9 DSC and FDF.
-  #
   DEFINE      PLATFORM_PACKAGE                = MinPlatformPkg
   DEFINE      PLATFORM_SI_PACKAGE             = KabylakeSiliconPkg
   DEFINE      PLATFORM_SI_BIN_PACKAGE         = KabylakeSiliconBinPkg
@@ -20,7 +15,7 @@
   DEFINE      PROJECT                         = $(PLATFORM_BOARD_PACKAGE)/$(BOARD)
 
   #
-  # Platform On/Off features are defined here
+  # Include PCD configuration for this board.
   #
   !include OpenBoardPkgPcd.dsc
 
@@ -68,8 +63,6 @@
   SUPPORTED_ARCHITECTURES             = IA32|X64
   BUILD_TARGETS                       = DEBUG|RELEASE
   SKUID_IDENTIFIER                    = ALL
-
-
   FLASH_DEFINITION                    = $(PROJECT)/OpenBoardPkg.fdf
 
   FIX_LOAD_TOP_MEMORY_ADDRESS         = 0x0
@@ -82,172 +75,205 @@
 
 ################################################################################
 #
-# SKU Identification section - list of all SKU IDs supported by this
-#                              Platform.
+# SKU Identification section - list of all SKU IDs supported by this board.
 #
 ################################################################################
 [SkuIds]
-  0|DEFAULT              # The entry: 0|DEFAULT is reserved and always required.
-  4|KabylakeRvp3
+  0x00|DEFAULT                # 0|DEFAULT is reserved and always required.
+  0x04|KabylakeRvp3
   0x60|KabyLakeYLpddr3Rvp3
 
 ################################################################################
 #
-# Library Class section - list of all Library Classes needed by this Platform.
+# Includes section - other DSC file contents included for this board build.
 #
 ################################################################################
 
+#######################################
+# Library Includes
+#######################################
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreCommonLib.dsc
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiLib.dsc
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeLib.dsc
+!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
+!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
+!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
+
+#######################################
+# Component Includes
+#######################################
+[Components.IA32]
+!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
+!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc
+
+[Components.X64]
+!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc
+!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
+
+#######################################
+# Build Option Includes
+#######################################
+!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc
+!include OpenBoardPkgBuildOption.dsc
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this board.
+#
+################################################################################
 
 [LibraryClasses.common]
-
-  PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf
-  ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/PeiReportFvLib.inf
-
-  PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf
-  PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf
-  PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
-  I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cAccessLib.inf
-  GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.inf
-
-  PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookLib.inf
-
-  FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
-  PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
-
+  #######################################
+  # Edk2 Packages
+  #######################################
   FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
   FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
 
-  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
-
-!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
-  #
-  # Below library are used by FSP API mode
-  #
-  SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
-  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
-!else
-  #
-  # Below library are used by FSP Dispatch mode and non-FSP build (EDK2 build)
-  #
-  SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
-  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
-!endif
-
+  #######################################
+  # Silicon Initialization Package
+  #######################################
   ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
   SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInitLib.inf
 
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+  #
+  # FSP API mode
+  #
+  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+!else
+  #
+  # FSP Dispatch mode and non-FSP build (EDK2 build)
+  #
+  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
+!endif
+
+  #####################################
+  # Platform Package
+  #####################################
   BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf
+  FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
+  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
+  PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf
+  PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf
+  PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf
+  PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
+  ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/PeiReportFvLib.inf
   TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLibNull/TestPointCheckLibNull.inf
 
-# Tbt
-!if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
-  TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf
-  DxeTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
-!endif
+  #######################################
+  # Board Package
+  #######################################
   EcLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseEcLib/BaseEcLib.inf
+  GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.inf
+  I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cAccessLib.inf
+  PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
 
-#
-# Silicon Init Package
-#
-!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
-
-[LibraryClasses.IA32]
-  #
-  # PEI phase common
-  #
-  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
-!if $(TARGET) == DEBUG
-  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
-!endif
-  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
-  MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
-  BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
-
-# Tbt
+  # Thunderbolt
 !if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
-  PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf
-  PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
+  DxeTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
+  TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf
+!endif
+
+  #######################################
+  # Board-specific
+  #######################################
+  PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookLib.inf
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+  #
+  # FSP API mode
+  #
+  SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+!else
+  #
+  # FSP Dispatch mode and non-FSP build (EDK2 build)
+  #
+  SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
 !endif
-#
-# Silicon Init Package
-#
-!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
 
 [LibraryClasses.IA32.SEC]
+  #######################################
+  # Platform Package
+  #######################################
   TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
   SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
 
-[LibraryClasses.X64]
-  #
-  # DXE phase common
-  #
-  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformLib.inf
+[LibraryClasses.common.PEIM]
+  #######################################
+  # Platform Package
+  #######################################
+  BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
+  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
+  MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
+  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
 !if $(TARGET) == DEBUG
-  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf
+  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
 !endif
-  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointLib.inf
-  MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf
+
+  #######################################
+  # Board Package
+  #######################################
+  # Thunderbolt
+!if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
+  PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
+  PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf
+!endif
+
+[LibraryClasses.common.DXE_DRIVER]
+  #######################################
+  # Silicon Initialization Package
+  #######################################
+  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInitLib/DxeSiliconPolicyInitLib.inf
+
+  #######################################
+  # Platform Package
+  #######################################
+  BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/DxeMultiBoardAcpiSupportLib.inf
   BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf
+  FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformLib.inf
   MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/DxeMultiBoardAcpiSupportLib.inf
-  BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/DxeMultiBoardAcpiSupportLib.inf
+  MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf
+  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointLib.inf
 
-  SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInitLib/DxeSiliconPolicyInitLib.inf
+!if $(TARGET) == DEBUG
+  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf
+!endif
+
+  #######################################
+  # Board-specific
+  #######################################
   SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLib.inf
 
-#
-# Silicon Init Package
-#
-!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
+[LibraryClasses.X64.DXE_RUNTIME_DRIVER]
+  #######################################
+  # Silicon Initialization Package
+  #######################################
+  ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemLib/DxeRuntimeResetSystemLib.inf
 
 [LibraryClasses.X64.DXE_SMM_DRIVER]
+  #######################################
+  # Silicon Initialization Package
+  #######################################
   SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
-!if $(TARGET) == DEBUG
-  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
-!endif
-  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPointLib.inf
-  MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf
+
+  #######################################
+  # Platform Package
+  #######################################
   BoardAcpiEnableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf
-
-[LibraryClasses.X64.DXE_RUNTIME_DRIVER]
-  ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemLib/DxeRuntimeResetSystemLib.inf
+  MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf
+  TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPointLib.inf
+!if $(TARGET) == DEBUG
+  TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
+!endif
 
 [Components.IA32]
-
-#
-# Common
-#
-!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
-
-  #
-  # FSP wrapper SEC Core
-  #
+  #######################################
+  # Edk2 Packages
+  #######################################
   UefiCpuPkg/SecCore/SecCore.inf {
     <LibraryClasses>
-      #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
       PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
   }
 
-#
-# Silicon
-#
-!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc
-
-#
-# Platform
-#
-  $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf
-  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf {
-    <LibraryClasses>
-!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
-      BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
-!else
-      NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
-!endif
-  }
-
 !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
   #
   # In FSP API mode the policy has to be installed before FSP Wrapper updating UPD.
@@ -257,16 +283,13 @@
     <LibraryClasses>
       SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibDependency/PeiPreMemSiliconPolicyInitLibDependency.inf
   }
-  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf {
+  IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf {
     <LibraryClasses>
-    #
-    # Hook a library constructor to update some policy fields when policy installed.
-    #
-    NULL|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyNotifyLib/PeiPreMemSiliconPolicyNotifyLib.inf
+      SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibDependency/PeiPostMemSiliconPolicyInitLibDependency.inf
   }
 !else
   #
-  # In FSP Dispatch mode the policy will be installed after FSP-M dispatched. (only PrePolicy silicon-init executed)
+  # In FSP Dispatch mode the policy will be installed after FSP-M dispatched (only PrePolicy silicon-init executed).
   # Do not add policy dependency and let FspmWrapper report FSP-M FV to dispatcher.
   #
   IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf {
@@ -274,89 +297,98 @@
       SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyInitLibNull/SiliconPolicyInitLibNull.inf
   }
   #
-  # FSP Dispatch mode will consume DefaultPolicyInit PPI produced by FSP to install a default policy PPI.
-  # Similar as UPD in FSP API mode, DefaultPolicyInit PPI in Dispatch mode can generate different policy structure
-  # for different FSP revisions, but they must maintain backward compatibility.
+  # In FSP Dispatch mode the policy will be installed after FSP-S dispatched (only PrePolicy silicon-init executed).
+  # Do not add policy dependency and let FspsWrapper report FSP-S FV to dispatcher.
   #
-  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf {
+  IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf {
     <LibraryClasses>
-      SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.inf
+      SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyInitLibNull/SiliconPolicyInitLibNull.inf
   }
 !endif
 
+  #######################################
+  # Silicon Initialization Package
+  #######################################
+  IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
+  IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.inf
+
+  #######################################
+  # Platform Package
+  #######################################
+  $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf
+  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf {
+    <LibraryClasses>
+      !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
+        BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+      !else
+        NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+      !endif
+  }
+
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf {
     <LibraryClasses>
-!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
-      BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
-!else
-      NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf
-!endif
+      !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
+        BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
+      !else
+        NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf
+      !endif
   }
 
 !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
-  #
-  # In FSP API mode the policy has to be installed before FSP Wrapper updating UPD.
-  # Add policy as dependency for FSP Wrapper
-  #
-  IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf {
+  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf {
     <LibraryClasses>
-      SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibDependency/PeiPostMemSiliconPolicyInitLibDependency.inf
+    #
+    # Hook a library constructor to update some policy fields when policy is installed.
+    #
+    NULL|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyNotifyLib/PeiPreMemSiliconPolicyNotifyLib.inf
   }
   $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
 !else
-  #
-  # In FSP Dispatch mode the policy will be installed after FSP-S dispatched. (only PrePolicy silicon-init executed)
-  # Do not add policy dependency and let FspsWrapper report FSP-S FV to dispatcher.
-  #
-  IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf {
-    <LibraryClasses>
-      SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyInitLibNull/SiliconPolicyInitLibNull.inf
-  }
   #
   # FSP Dispatch mode will consume DefaultPolicyInit PPI produced by FSP to install a default policy PPI.
   # Similar as UPD in FSP API mode, DefaultPolicyInit PPI in Dispatch mode can generate different policy structure
   # for different FSP revisions, but they must maintain backward compatibility.
   #
+  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf {
+    <LibraryClasses>
+      SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.inf
+  }
   $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf {
     <LibraryClasses>
       SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.inf
   }
 !endif
 
-#
-# Security
-#
-
 !if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
   $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf
 !endif
 
-  IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
-  IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.inf
-
-# Tbt
+  #######################################
+  # Board Package
+  #######################################
+  # Thunderbolt
 !if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
   $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Pei/PeiTbtInit.inf
 !endif
 
 [Components.X64]
-
-#
-# Common
-#
-!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc
-
-  UefiCpuPkg/CpuDxe/CpuDxe.inf
+  #######################################
+  # Edk2 Packages
+  #######################################
+  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
   MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
-
   MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
-  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+  UefiCpuPkg/CpuDxe/CpuDxe.inf
 
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
   #
-  # Shell
+  # FSP API mode
   #
+  IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
+!endif
+
   ShellPkg/Application/Shell/Shell.inf {
    <PcdsFixedAtBuild>
      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
@@ -376,92 +408,79 @@
      ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
   }
 
-#
-# Silicon
-#
-!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
-
-# Tbt
-!if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
-  $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf
-  $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf
-  $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf
-!endif
-
-#
-# Platform
-#
-  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
-  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
-!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
-  #
-  # Below module is used by FSP API mode
-  #
-  IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
-!endif
-  $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
-
-  $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf
-  $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf
-
-#
-# OS Boot
-#
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
-  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf {
-    <LibraryClasses>
-!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
-      BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
-!else
-      NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
-!endif
-  }
-  $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf {
-    <LibraryClasses>
-!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
-      BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
-!else
-      NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
-!endif
-  }
-  $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
-    <LibraryClasses>
-!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
-      BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
-!else
-      NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
-!endif
-  }
-
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
-  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-
   UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
     <PcdsPatchableInModule>
       gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80080046
     <LibraryClasses>
-!if $(TARGET) == DEBUG
-      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-!endif
+      !if $(TARGET) == DEBUG
+        DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+      !endif
   }
-
-!endif
-
-#
-# Security
-#
-  $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
-  $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
 !endif
 
+  #######################################
+  # Silicon Initialization Package
+  #######################################
   IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
-
-#
-# Other
-#
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
-!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc
-!include OpenBoardPkgBuildOption.dsc
+  #######################################
+  # Platform Package
+  #######################################
+  $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
+  $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf
+  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
+  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
+  $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf
+  $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+  $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+
+  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
+
+  $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
+    <LibraryClasses>
+      !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
+        BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
+      !else
+        NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
+      !endif
+  }
+
+  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf {
+    <LibraryClasses>
+      !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
+        BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+      !else
+        NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+      !endif
+  }
+
+!endif
+
+  #######################################
+  # Board Package
+  #######################################
+  # Thunderbolt
+!if gBoardModuleTokenSpaceGuid.PcdTbtEnable == TRUE
+  $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+  $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf
+  $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf {
+    <LibraryClasses>
+      !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE
+        BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+      !else
+        NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+      !endif
+  }
+!endif
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index edb4013cc0..15d05bea43 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
@@ -1,5 +1,5 @@
 ## @file
-#  Platform description.
+#  PCD configuration build description file for the KabylakeRvp3 board.
 #
 # Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
 #
@@ -9,12 +9,16 @@
 
 ################################################################################
 #
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+# Pcd Section - list of all PCD Entries used by this board.
 #
 ################################################################################
-[PcdsFixedAtBuild]
+
+[PcdsFixedAtBuild.common]
+  ######################################
+  # Key Boot Stage and FSP configuration
+  ######################################
   #
-  # Please select BootStage here.
+  # Please select the Boot Stage here.
   # Stage 1 - enable debug (system deadloop after debug init)
   # Stage 2 - mem init (system deadloop after mem init)
   # Stage 3 - boot to shell only
@@ -23,61 +27,87 @@
   #
   gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
 
+  #
+  # 0: FSP Wrapper is running in Dispatch mode.
+  # 1: FSP Wrapper is running in API mode.
+  #
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
+
+  #
+  # FALSE: The board is not a FSP wrapper (FSP binary not used)
+  # TRUE:  The board is a FSP wrapper (FSP binary is used)
+  #
+  gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
+
+  #
+  # FSP Base address PCD will be updated in FDF basing on flash map.
+  #
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
+
+  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
+  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+  gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
+  gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+  gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
+
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+  #
+  # FSP API mode does not share stack with the boot loader,
+  # so FSP needs more temporary memory for FSP heap + stack size.
+  #
+  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
+  #
+  # FSP API mode does not need to enlarge the boot loader stack size
+  # since the stacks are separate.
+  #
+  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
+!else
+  #
+  # In FSP Dispatch mode boot loader stack size must be large
+  # enough for executing both boot loader and FSP.
+  #
+  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
+!endif
+
+!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
+  gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+  gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
+!else
+  #
+  # FSP Dispatch mode requires more platform memory as boot loader and FSP sharing the same
+  # platform memory.
+  #
+  gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000
+!endif
+
 [PcdsFeatureFlag.common]
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
-!endif
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
-!endif
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
-!endif
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
-!endif
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
-  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
+  ######################################
+  # Edk2 Configuration
+  ######################################
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
+!if $(TARGET) == RELEASE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
 !endif
-
-  gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE
-  #
-  # More fine granularity control below:
-  #
-
-
-  gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE
-
-
-
-#
-# TRUE is ENABLE. FALSE is DISABLE.
-#
-
-#
-# BIOS build switches configuration
-#
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+
+  ######################################
+  # Silicon Configuration
+  ######################################
+  # Build switches
   gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
 
-# CPU
-  gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
-  gSiPkgTokenSpaceGuid.PcdTxtEnable|TRUE  #Set to FALSE for GCC Build @todo Convert TXT ASM to NASM
+  # CPU
   gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE
+  gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
+  gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
 
-# SA
+  # SA
   gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE
@@ -88,207 +118,133 @@
   gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE
 
-# ME
+  # ME
   gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE
-  gSiPkgTokenSpaceGuid.PcdPttEnable|TRUE
+  gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
   gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE
 
+  # Others
   gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE
-  gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE
-  gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
   gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE
-  gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
+  gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
+  gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE
   gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE
+  gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE
+  gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
   gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE
   gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE
-  gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
-  gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE
-
-#
-# Override some PCDs for specific build requirements.
-#
-  #
-  # Disable USB debug message when Source Level Debug is enabled
-  # because they cannot be enabled at the same time.
-  #
-
-    gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
-    gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
-    gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
-
-
-
-  !if $(TARGET) == DEBUG
-    gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
-  !else
-    gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
-  !endif
-
-  !if $(TARGET) == DEBUG
-    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
-  !else
-    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
-  !endif
-
+  gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
+
+  ######################################
+  # Platform Configuration
+  ######################################
+  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
   gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
 
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
-  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
-!if $(TARGET) == RELEASE
-  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
+  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
+  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
+  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
+!endif
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
+  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
+  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
+!endif
+
+!if $(TARGET) == DEBUG
+  gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
 !else
-  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
+  gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
 !endif
-  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
 
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
-
-  gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+  ######################################
+  # Board Configuration
+  ######################################
+  gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE
+  gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE
 
 [PcdsFixedAtBuild.common]
-  gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
-  #
-  # 0: FSP Wrapper is running in Dispatch mode.
-  # 1: FSP Wrapper is running in API mode.
-  #
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
-
+  ######################################
+  # Edk2 Configuration
+  ######################################
+!if $(TARGET) == RELEASE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
+!else
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+!endif
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
 !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
   gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
+!endif
+
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
+  gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
+!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
 !endif
-
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
 !if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE
   gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1
 !endif
-
-  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
-  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
-  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
-
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
-  gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
-  gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
-  gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
-  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
-  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
-
-!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
-  #
-  # FSP API mode is backward compatible with earlier FSP which
-  # does not share stack with boot loader, so FSP needs more
-  # temporary memory for FSP heap + stack size.
-  #
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize        | 0x00026000
-
-  #
-  # In FSP API mode, FSP and boot loader runnig on different stack
-  # so no need to enlarge boot loader stack size.
-  #
-  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
-!else
-  #
-  # FSP Dispatch mode will share the same stack and heap with boot loader,
-  # no separate temporary ram required by FSP.
-  #
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize        | 0
-
-  #
-  # In FSP Dispatch mode boot loader stack size must be big enough for executing
-  # both boot loader and FSP.
-  #
-  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
-!endif
-
-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
-
   gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
-!if $(TARGET) == RELEASE
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
-  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
-!else
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+!if $(TARGET) == DEBUG
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
-  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
 !endif
-  gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
-  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
-  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
-
-
-
-
-gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
-
-#
-# 8MB Default
-#
-gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
-
-#
-# 16MB TSEG in Debug build only.
-#
-!if $(TARGET) == DEBUG
-  gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
-!endif
-
-
 
+  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
+  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
-  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
-  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
-  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40
+  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
-  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
+  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
 
-  !if $(TARGET) == RELEASE
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
-  !else
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
-  !endif
-
-
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
-  !if $(TARGET) == RELEASE
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
-  !else
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
-  !endif
-
-  #
-  # FSP Base address PCD will be updated in FDF basing on flash map.
-  #
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
-
-  ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
-  # @Prompt Timeout for the BSP to detect all APs for the first time.
+  # Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000
-
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
 !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
   #
   # In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild
   # (They will be DynamicEx in FSP Dispatch mode)
   #
   ## Specifies max supported number of Logical Processors.
-  # @Prompt Configure max supported number of Logical Processorss
+  # @Prompt Configure max supported number of Logical Processors
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|12
 
   ## Specifies the size of the microcode Region.
@@ -302,17 +258,24 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
   #  3: Place AP in the Run-Loop state.
   # @Prompt The AP wait loop state.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
-
-  gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
-  gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
-!else
-  #
-  # FSP Dispatch mode requires more platform memory as boot loader and FSP sharing the same
-  # platform memory.
-  #
-  gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000
 !endif
 
+  ######################################
+  # Silicon Configuration
+  ######################################
+
+  # Refer to HstiFeatureBit.h for bit definitions
+  gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
+  gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
+
+  ######################################
+  # Platform Configuration
+  ######################################
+  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
+  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
+  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
+  gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
+
   #
   # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
   #
@@ -324,11 +287,18 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
   #
   gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
 
-  #
-  # See HstiFeatureBit.h for the definition
-  #
-  gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
-  gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
+!if $(TARGET) == RELEASE
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
+!else
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
+!endif
+
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
+!if $(TARGET) == RELEASE
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
+!else
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
+!endif
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1
   gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
@@ -355,90 +325,111 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
 !endif
 
 [PcdsFixedAtBuild.IA32]
+  ######################################
+  # Edk2 Configuration
+  ######################################
   gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
   gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
-  gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
   gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
 
+  ######################################
+  # Platform Configuration
+  ######################################
+  gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
+
 [PcdsFixedAtBuild.X64]
+  ######################################
+  # Edk2 Configuration
+  ######################################
+
   # Default platform supported RFC 4646 languages: (American) English
   gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
 
-
 [PcdsPatchableInModule.common]
+  ######################################
+  # Edk2 Configuration
+  ######################################
   gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208
-
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
 
+  ######################################
+  # Silicon Configuration
+  ######################################
 !if $(TARGET) == DEBUG
   gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1
 !endif
 
-[PcdsDynamicHii.X64.DEFAULT]
-  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
-  gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
-
-!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
-  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
-!endif
-
 [PcdsDynamicDefault]
-  #
-  # FSP Base address PCD will be updated in FDF basing on flash map.
-  #
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
-  # Platform will pre-allocate UPD buffer and pass it to FspWrapper
-  # Those dummy address will be patched before FspWrapper executing
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF
-
-[PcdsDynamicDefault.common.DEFAULT]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
-  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
+  ######################################
+  # Edk2 Configuration
+  ######################################
   gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE
   gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
+
   #
   #  Set video to native resolution as Windows 8 WHCK requirement.
   #
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
 
-  gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
-
-[PcdsDynamicDefault.common.DEFAULT]
-  # gEfiTpmDeviceInstanceTpm20DtpmGuid
-  gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
   gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0
   gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+  gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
 
-# Tbt
-gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtControllerType | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType | 0x2
-gBoardModuleTokenSpaceGuid.PcdExpander | 0x0
-gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad | 13
-gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad | 0x02010011
-gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature | 0
-gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting | 0
-gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode | 0x1
-#gBoardModuleTokenSpaceGuid.PcdDTbtGpio5Filter | 0x0
-gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport | 0x0
-gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq| 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtAspm | 0x0
-gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch | 0x0
-gBoardModuleTokenSpaceGuid.PcdRtd3Tbt | 0x1
-gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq | 0x1
-gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support | 0x0
-gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay | 0x0
-gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay | 5000
-gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd | 56
-gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd | 100
-gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax | 26
-gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd | 100
-gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax | 28
-gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe| 0x00000001
+  #
+  # FSP Base address PCD will be updated in FDF basing on flash map.
+  #
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
+  # Platform will pre-allocate UPD buffer and pass it to FspWrapper
+  # Those dummy address will be patched before FspWrapper executing
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF
+
+  ######################################
+  # Board Configuration
+  ######################################
+
+  # Thunderbolt Configuration
+  gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0
+  gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0
+  gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0
+  gBoardModuleTokenSpaceGuid.PcdDTbtAspm|0x0
+  gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011
+  gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtControllerType|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13
+  gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType|0x2
+  gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56
+  gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26
+  gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd|100
+  gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28
+  gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd|100
+  gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq|0x1
+  gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport|0x0
+  gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support|0x0
+  gBoardModuleTokenSpaceGuid.PcdExpander|0x0
+  gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001
+  gBoardModuleTokenSpaceGuid.PcdRtd3Tbt|0x1
+  gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq|0x1
+  gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0
+  gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay|5000
+
+[PcdsDynamicHii.X64.DEFAULT]
+  ######################################
+  # Edk2 Configuration
+  ######################################
+  gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
+!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
+!else
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
+!endif
-- 
2.16.2.windows.1