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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id a9sm8420380wmf.14.2019.10.10.03.25.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 03:25:38 -0700 (PDT) Resent-From: Leif Lindholm Resent-Date: Thu, 10 Oct 2019 11:25:37 +0100 Resent-Message-ID: <20191010102537.GZ25504@bivouac.eciton.net> Resent-To: devel@edk2.groups.io Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id q15sm8253083wrg.65.2019.10.10.03.17.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 03:17:15 -0700 (PDT) Date: Thu, 10 Oct 2019 11:17:13 +0100 From: "Leif Lindholm" To: Meenakshi Aggarwal Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, edk2-devel@lists.01.org, v.sethi@nxp.com Subject: Re: [PATCH edk2-platforms 01/12] Silicon/NXP: Add Library to provide Mmio APIs with swapped data. Message-ID: <20191010101713.GX25504@bivouac.eciton.net> References: <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> <1570639758-30355-1-git-send-email-meenakshi.aggarwal@nxp.com> <1570639758-30355-2-git-send-email-meenakshi.aggarwal@nxp.com> MIME-Version: 1.0 In-Reply-To: <1570639758-30355-2-git-send-email-meenakshi.aggarwal@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Oct 09, 2019 at 10:19:07PM +0530, Meenakshi Aggarwal wrote: > This library provided MMIO APIs for modules need swapping. > > Signed-off-by: Meenakshi Aggarwal This looks good to me. Reviewed-by: Leif Lindholm I will merge this into Silicon/NXP initially once the set is ready to go in, and migrate it across to edk2 at a later date. > --- > Silicon/NXP/Include/Library/IoAccessLib.h | 248 +++++++++++++++++++ > Silicon/NXP/Library/IoAccessLib/IoAccessLib.c | 302 ++++++++++++++++++++++++ > Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf | 26 ++ If we need another revision of this set, please follow the format-patch steps from https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers Executing /BaseTools/Scripts/SetupGit.py inside your repository sets some of the flags persistently there, including the most important one - the "orderfile", which helps code review substantially. / Leif > 3 files changed, 576 insertions(+) > create mode 100644 Silicon/NXP/Include/Library/IoAccessLib.h > create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > > diff --git a/Silicon/NXP/Include/Library/IoAccessLib.h b/Silicon/NXP/Include/Library/IoAccessLib.h > new file mode 100644 > index 0000000..b72e65c > --- /dev/null > +++ b/Silicon/NXP/Include/Library/IoAccessLib.h > @@ -0,0 +1,248 @@ > +/** @file > + * > + * Copyright 2017-2019 NXP > + * > + * SPDX-License-Identifier: BSD-2-Clause-Patent > + * > + **/ > + > +#ifndef IO_ACCESS_LIB_H_ > +#define IO_ACCESS_LIB_H_ > + > +#include > + > +/** > + MmioRead16 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioRead16 ( > + IN UINTN Address > + ); > + > +/** > + MmioRead32 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioRead32 ( > + IN UINTN Address > + ); > + > +/** > + MmioRead64 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioRead64 ( > + IN UINTN Address > + ); > + > +/** > + MmioWrite16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioWrite16 ( > + IN UINTN Address, > + IN UINT16 Value > + ); > + > +/** > + MmioWrite32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioWrite32 ( > + IN UINTN Address, > + IN UINT32 Value > + ); > + > +/** > + MmioWrite64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioWrite64 ( > + IN UINTN Address, > + IN UINT64 Value > + ); > + > +/** > + MmioAndThenOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAndThenOr16 ( > + IN UINTN Address, > + IN UINT16 AndData, > + IN UINT16 OrData > + ); > + > +/** > + MmioAndThenOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAndThenOr32 ( > + IN UINTN Address, > + IN UINT32 AndData, > + IN UINT32 OrData > + ); > + > +/** > + MmioAndThenOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAndThenOr64 ( > + IN UINTN Address, > + IN UINT64 AndData, > + IN UINT64 OrData > + ); > + > +/** > + MmioOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioOr16 ( > + IN UINTN Address, > + IN UINT16 OrData > + ); > + > +/** > + MmioOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioOr32 ( > + IN UINTN Address, > + IN UINT32 OrData > + ); > + > +/** > + MmioOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioOr64 ( > + IN UINTN Address, > + IN UINT64 OrData > + ); > + > +/** > + MmioAnd16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAnd16 ( > + IN UINTN Address, > + IN UINT16 AndData > + ); > + > +/** > + MmioAnd32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAnd32 ( > + IN UINTN Address, > + IN UINT32 AndData > + ); > + > +/** > + MmioAnd64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAnd64 ( > + IN UINTN Address, > + IN UINT64 AndData > + ); > + > +#endif /* IO_ACCESS_LIB_H_ */ > diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > new file mode 100644 > index 0000000..e9e535f > --- /dev/null > +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > @@ -0,0 +1,302 @@ > +/** IoAccessLib.c > + > + Provide MMIO APIs for BE modules. > + > + Copyright 2017-2019 NXP > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > + > +/** > + MmioRead16 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioRead16 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes16 (MmioRead16 (Address)); > +} > + > +/** > + MmioRead32 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioRead32 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes32 (MmioRead32 (Address)); > +} > + > +/** > + MmioRead64 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioRead64 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes64 (MmioRead64 (Address)); > +} > + > +/** > + MmioWrite16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioWrite16 ( > + IN UINTN Address, > + IN UINT16 Value > + ) > +{ > + return MmioWrite16 (Address, SwapBytes16 (Value)); > +} > + > +/** > + MmioWrite32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioWrite32 ( > + IN UINTN Address, > + IN UINT32 Value > + ) > +{ > + return MmioWrite32 (Address, SwapBytes32 (Value)); > +} > + > +/** > + MmioWrite64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioWrite64 ( > + IN UINTN Address, > + IN UINT64 Value > + ) > +{ > + return MmioWrite64 (Address, SwapBytes64 (Value)); > +} > + > +/** > + MmioAndThenOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAndThenOr16 ( > + IN UINTN Address, > + IN UINT16 AndData, > + IN UINT16 OrData > + ) > +{ > + AndData = SwapBytes16 (AndData); > + OrData = SwapBytes16 (OrData); > + > + return MmioAndThenOr16 (Address, AndData, OrData); > +} > + > +/** > + MmioAndThenOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAndThenOr32 ( > + IN UINTN Address, > + IN UINT32 AndData, > + IN UINT32 OrData > + ) > +{ > + AndData = SwapBytes32 (AndData); > + OrData = SwapBytes32 (OrData); > + > + return MmioAndThenOr32 (Address, AndData, OrData); > +} > + > +/** > + MmioAndThenOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAndThenOr64 ( > + IN UINTN Address, > + IN UINT64 AndData, > + IN UINT64 OrData > + ) > +{ > + AndData = SwapBytes64 (AndData); > + OrData = SwapBytes64 (OrData); > + > + return MmioAndThenOr64 (Address, AndData, OrData); > +} > + > +/** > + MmioOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioOr16 ( > + IN UINTN Address, > + IN UINT16 OrData > + ) > +{ > + return MmioOr16 (Address, SwapBytes16 (OrData)); > +} > + > +/** > + MmioOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioOr32 ( > + IN UINTN Address, > + IN UINT32 OrData > + ) > +{ > + return MmioOr32 (Address, SwapBytes32 (OrData)); > +} > + > +/** > + MmioOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioOr64 ( > + IN UINTN Address, > + IN UINT64 OrData > + ) > +{ > + return MmioOr64 (Address, SwapBytes64 (OrData)); > +} > + > +/** > + MmioAnd16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAnd16 ( > + IN UINTN Address, > + IN UINT16 AndData > + ) > +{ > + return MmioAnd16 (Address, SwapBytes16 (AndData)); > +} > + > +/** > + MmioAnd32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAnd32 ( > + IN UINTN Address, > + IN UINT32 AndData > + ) > +{ > + return MmioAnd32 (Address, SwapBytes32 (AndData)); > +} > + > +/** > + MmioAnd64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAnd64 ( > + IN UINTN Address, > + IN UINT64 AndData > + ) > +{ > + return MmioAnd64 (Address, SwapBytes64 (AndData)); > +} > diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > new file mode 100644 > index 0000000..4f3af46 > --- /dev/null > +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > @@ -0,0 +1,26 @@ > +## @IoAccessLib.inf > + > +# Copyright 2017-2019 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = IoAccessLib > + FILE_GUID = 28d77333-77eb-4faf-8735-130e5eb3e343 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = IoAccessLib > + > +[Sources.common] > + IoAccessLib.c > + > +[Packages] > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/NXP/NxpQoriqLs.dec > + > +[LibraryClasses] > + IoLib > -- > 1.9.1 >