From: "Javeed, Ashraf" <ashraf.javeed@intel.com>
To: devel@edk2.groups.io
Cc: Jian J Wang <jian.j.wang@intel.com>,
Hao A Wu <hao.a.wu@intel.com>, Ray Ni <ray.ni@intel.com>
Subject: [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start
Date: Fri, 1 Nov 2019 20:39:43 +0530 [thread overview]
Message-ID: <20191101150952.3340-4-ashraf.javeed@intel.com> (raw)
In-Reply-To: <20191101150952.3340-1-ashraf.javeed@intel.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194
The separation of the PCI device registration phase includes only the
installation of the PCI IO Protocol on the PCI node to acquire the EFI
handles, and loading of its applicable PCI Option ROM.
The separation of the PCI device start phase only includes the code that
enables the PCI Bridge device as a Bus Master.
This code change is made in order to introduce the enabling of the other
PCI features in the PCI Bus driver.
Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 164 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------------------------
1 file changed, 130 insertions(+), 34 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index 149a120..33a0e94 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -561,7 +561,7 @@ DeRegisterPciDevice (
}
/**
- Start to manage the PCI device on the specified root bridge or PCI-PCI Bridge.
+ Start the PCI root Ports or PCI-PCI Bridge only.
@param Controller The root bridge handle.
@param RootBridge A pointer to the PCI_IO_DEVICE.
@@ -576,7 +576,82 @@ DeRegisterPciDevice (
**/
EFI_STATUS
-StartPciDevicesOnBridge (
+StartPciRootPortsOnBridge (
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *RootBridge
+ )
+
+{
+ PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ LIST_ENTRY *CurrentLink;
+ UINT64 Supports;
+
+ PciIoDevice = NULL;
+ CurrentLink = RootBridge->ChildList.ForwardLink;
+
+ while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {
+
+ PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+
+ //
+ // check if the device has been assigned with required resource
+ // and registered
+ //
+ if (!PciIoDevice->Registered && !PciIoDevice->Allocated) {
+ return EFI_NOT_READY;
+ }
+
+ if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
+ Status = StartPciRootPortsOnBridge (
+ Controller,
+ PciIoDevice
+ );
+
+ PciIoDevice->PciIo.Attributes (
+ &(PciIoDevice->PciIo),
+ EfiPciIoAttributeOperationSupported,
+ 0,
+ &Supports
+ );
+ Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
+ PciIoDevice->PciIo.Attributes (
+ &(PciIoDevice->PciIo),
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
+
+ }
+
+ CurrentLink = CurrentLink->ForwardLink;
+ }
+
+ if (PciIoDevice == NULL) {
+ return EFI_NOT_FOUND;
+ } else {
+ return EFI_SUCCESS;
+ }
+}
+
+
+/**
+ Register to manage the PCI device on the specified root bridge or PCI-PCI Bridge.
+
+ @param Controller The root bridge handle.
+ @param RootBridge A pointer to the PCI_IO_DEVICE.
+ @param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.
+ @param NumberOfChildren Children number.
+ @param ChildHandleBuffer A pointer to the child handle buffer.
+
+ @retval EFI_NOT_READY Device is not allocated.
+ @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
+ @retval EFI_NOT_FOUND Can not find the specific device.
+ @retval EFI_SUCCESS Success to start Pci devices on bridge.
+
+**/
+EFI_STATUS
+RegisterPciDevicesOnBridge (
IN EFI_HANDLE Controller,
IN PCI_IO_DEVICE *RootBridge,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
@@ -590,7 +665,6 @@ StartPciDevicesOnBridge (
EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;
EFI_STATUS Status;
LIST_ENTRY *CurrentLink;
- UINT64 Supports;
PciIoDevice = NULL;
CurrentLink = RootBridge->ChildList.ForwardLink;
@@ -645,7 +719,7 @@ StartPciDevicesOnBridge (
// If it is a PPB
//
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
- Status = StartPciDevicesOnBridge (
+ Status = RegisterPciDevicesOnBridge (
Controller,
PciIoDevice,
CurrentDevicePath,
@@ -653,20 +727,6 @@ StartPciDevicesOnBridge (
ChildHandleBuffer
);
- PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
- Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
-
return Status;
} else {
@@ -697,28 +757,13 @@ StartPciDevicesOnBridge (
}
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
- Status = StartPciDevicesOnBridge (
+ Status = RegisterPciDevicesOnBridge (
Controller,
PciIoDevice,
RemainingDevicePath,
NumberOfChildren,
ChildHandleBuffer
);
-
- PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
- Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
-
}
CurrentLink = CurrentLink->ForwardLink;
@@ -732,6 +777,57 @@ StartPciDevicesOnBridge (
}
}
+/**
+ Start to manage the PCI device on the specified root bridge or PCI-PCI Bridge.
+
+ @param Controller The root bridge handle.
+ @param RootBridge A pointer to the PCI_IO_DEVICE.
+ @param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.
+ @param NumberOfChildren Children number.
+ @param ChildHandleBuffer A pointer to the child handle buffer.
+
+ @retval EFI_NOT_READY Device is not allocated.
+ @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
+ @retval EFI_NOT_FOUND Can not find the specific device.
+ @retval EFI_SUCCESS Success to start Pci devices on bridge.
+
+**/
+EFI_STATUS
+StartPciDevicesOnBridge (
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *RootBridge,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
+ IN OUT UINT8 *NumberOfChildren,
+ IN OUT EFI_HANDLE *ChildHandleBuffer
+ )
+
+{
+ EFI_STATUS Status;
+
+ //
+ // first register all the PCI devices
+ //
+ Status = RegisterPciDevicesOnBridge (
+ Controller,
+ RootBridge,
+ RemainingDevicePath,
+ NumberOfChildren,
+ ChildHandleBuffer
+ );
+
+ if (EFI_ERROR (Status) == EFI_NOT_FOUND) {
+ return Status;
+ } else {
+ //
+ // finally start those PCI bridge port devices only
+ //
+ return StartPciRootPortsOnBridge (
+ Controller,
+ RootBridge
+ );
+ }
+}
+
/**
Start to manage all the PCI devices it found previously under
the entire host bridge.
--
2.21.0.windows.1
next prev parent reply other threads:[~2019-11-01 15:10 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-01 15:09 [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 00/12] New PCI features - MPS, MRRS, RO, NS, CTO Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code Javeed, Ashraf
2019-11-01 15:09 ` Javeed, Ashraf [this message]
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/12] PciBusDxe: Inclusion of new PCI Platform Protocol 2 Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup " Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 07/12] PciBusDxe: Record the PCI-Express Capability Structure Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 08/12] PciBusDxe: New PCI feature Max_Payload_Size Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 09/12] PciBusDxe: New PCI feature Max_Read_Req_Size Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 10/12] PciBusDxe: New PCI feature Relax Ordering Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 11/12] PciBusDxe: New PCI feature No-Snoop Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 12/12] PciBusDxe: New PCI feature Completion Timeout Javeed, Ashraf
[not found] ` <15D3127A726D26A6.7420@groups.io>
2019-11-13 3:22 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Javeed, Ashraf
2019-12-16 12:46 ` Ni, Ray
[not found] ` <15D3127AABF5037C.32624@groups.io>
2019-11-13 3:23 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code Javeed, Ashraf
2019-12-16 12:46 ` Ni, Ray
[not found] ` <15D3127A98E21087.7420@groups.io>
2019-11-13 3:25 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start Javeed, Ashraf
2019-12-17 1:38 ` Ni, Ray
2019-12-17 3:19 ` Javeed, Ashraf
2019-12-19 1:34 ` Ni, Ray
2019-12-19 4:12 ` Javeed, Ashraf
[not found] ` <15D3127AAE5DC481.32624@groups.io>
2019-11-13 3:26 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/12] PciBusDxe: Inclusion of new PCI Platform Protocol 2 Javeed, Ashraf
[not found] ` <15D3127B934F51D3.12315@groups.io>
2019-11-13 3:27 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration Javeed, Ashraf
2019-12-17 11:56 ` Ni, Ray
2019-12-18 7:14 ` Javeed, Ashraf
2019-12-19 5:48 ` Ni, Ray
[not found] ` <15E1AFB3EABD031C.30484@groups.io>
2020-03-05 14:12 ` Ni, Ray
2020-03-16 9:33 ` Javeed, Ashraf
2020-03-16 14:00 ` Ni, Ray
2020-03-17 7:20 ` Javeed, Ashraf
2020-03-17 15:36 ` Ni, Ray
2020-04-20 13:22 ` Javeed, Ashraf
2020-04-21 6:03 ` Javeed, Ashraf
2020-04-21 6:22 ` Javeed, Ashraf
2020-05-08 8:26 ` Ni, Ray
[not found] ` <15D3127BE430E7DA.31784@groups.io>
2019-11-13 3:28 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup " Javeed, Ashraf
2019-12-17 11:59 ` Ni, Ray
2019-12-18 7:15 ` Javeed, Ashraf
[not found] ` <15D3127C6DFCD4A7.12315@groups.io>
2019-11-13 3:29 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 07/12] PciBusDxe: Record the PCI-Express Capability Structure Javeed, Ashraf
2019-12-17 12:03 ` Ni, Ray
2019-12-18 7:32 ` Javeed, Ashraf
[not found] ` <15D3127D273722D4.32624@groups.io>
2019-11-13 3:30 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 08/12] PciBusDxe: New PCI feature Max_Payload_Size Javeed, Ashraf
2019-12-18 8:38 ` Ni, Ray
2019-12-18 9:10 ` Ni, Ray
2019-12-18 14:35 ` Javeed, Ashraf
2019-12-19 2:14 ` Ni, Ray
[not found] ` <15D3127DA6E2D860.7420@groups.io>
2019-11-13 3:31 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 09/12] PciBusDxe: New PCI feature Max_Read_Req_Size Javeed, Ashraf
[not found] ` <15D3127E471DF360.32624@groups.io>
2019-11-13 3:32 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 10/12] PciBusDxe: New PCI feature Relax Ordering Javeed, Ashraf
[not found] ` <15D3127EB6ED8506.12315@groups.io>
2019-11-13 3:33 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 11/12] PciBusDxe: New PCI feature No-Snoop Javeed, Ashraf
[not found] ` <15D3127F5541064B.31784@groups.io>
2019-11-13 3:34 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 12/12] PciBusDxe: New PCI feature Completion Timeout Javeed, Ashraf
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