From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web10.2420.1573707711969413360 for ; Wed, 13 Nov 2019 21:01:52 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2019 21:01:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,302,1569308400"; d="scan'208";a="404856592" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga005.fm.intel.com with ESMTP; 13 Nov 2019 21:01:50 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Sean Brogan , Jian J Wang , Ray Ni , Hao A Wu Subject: [PATCH v1] MdeModulePkg/NvmExpressDxe: Fix wrong queue size for async IO queues Date: Thu, 14 Nov 2019 13:01:41 +0800 Message-Id: <20191114050141.18352-1-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 From: Sean Brogan REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2118 When a packet is queued/completed for the asynchronous IO queue, the logic to roll over to the front of the queue doesn't account for actual size of the IO Submission/Completion queue. This causes a device to hang due to doorbell being outside of visible queue. An example would be if an NVMe drive only supported a queue size of 128 while the driver supports 256. Cc: Jian J Wang Cc: Ray Ni Signed-off-by: Sean Brogan Signed-off-by: Hao A Wu --- MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c | 2 +- MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c index 3bde96bc95..62886d5c91 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c @@ -672,7 +672,7 @@ ProcessAsyncTaskList ( } Private->CqHdbl[QueueId].Cqh++; - if (Private->CqHdbl[QueueId].Cqh > NVME_ASYNC_CCQ_SIZE) { + if (Private->CqHdbl[QueueId].Cqh > MIN (NVME_ASYNC_CCQ_SIZE, Private->Cap.Mqes)) { Private->CqHdbl[QueueId].Cqh = 0; Private->Pt[QueueId] ^= 1; } diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c index 8e72137946..e9357b1239 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c @@ -452,6 +452,7 @@ NvmExpressPassThru ( NVME_SQ *Sq; NVME_CQ *Cq; UINT16 QueueId; + UINT16 QueueSize; UINT32 Bytes; UINT16 Offset; EFI_EVENT TimerEvent; @@ -540,6 +541,7 @@ NvmExpressPassThru ( Prp = NULL; TimerEvent = NULL; Status = EFI_SUCCESS; + QueueSize = MIN (NVME_ASYNC_CSQ_SIZE, Private->Cap.Mqes) + 1; if (Packet->QueueType == NVME_ADMIN_QUEUE) { QueueId = 0; @@ -552,7 +554,7 @@ NvmExpressPassThru ( // // Submission queue full check. // - if ((Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + 1) == + if ((Private->SqTdbl[QueueId].Sqt + 1) % QueueSize == Private->AsyncSqHead) { return EFI_NOT_READY; } @@ -701,7 +703,7 @@ NvmExpressPassThru ( // if ((Event != NULL) && (QueueId != 0)) { Private->SqTdbl[QueueId].Sqt = - (Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + 1); + (Private->SqTdbl[QueueId].Sqt + 1) % QueueSize; } else { Private->SqTdbl[QueueId].Sqt ^= 1; } -- 2.12.0.windows.1