* [PATCH edk2-platforms 2/3] Silicon/AMD/Styx: clean up stream ID mappings for SMMU
2019-11-25 18:07 [PATCH edk2-platforms 0/3] fixes for AMD OverDrive Ard Biesheuvel
2019-11-25 18:07 ` [PATCH edk2-platforms 1/3] Platform/Overdrive: add missing resolution for FileHandleLib Ard Biesheuvel
@ 2019-11-25 18:07 ` Ard Biesheuvel
2019-11-25 18:07 ` [PATCH edk2-platforms 3/3] Platform/Overdrive: clean up stream ID descriptions in DT Ard Biesheuvel
2019-11-26 11:47 ` [PATCH edk2-platforms 0/3] fixes for AMD OverDrive Leif Lindholm
3 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2019-11-25 18:07 UTC (permalink / raw)
To: devel; +Cc: leif.lindholm, Ard Biesheuvel
Tighten the stream ID mappings for the SMMU to only cover the stream IDs
that are actually being issued by the respective masters. This is
mostly just a cleanup exercise, since specifying unused stream IDs does
not typically create any problems. However, the CCP crypto accelerator
on B1 silicon actually uses stream IDs that we assigned to the second
SATA controller, so there this actually fixes a problem.
Since the crypto accelerator is not behind a SMMU on B0 silicon, we need
to either parameterize the IORT using C code, or drop the CCP entirely
from the B0 description. Given that most distros don't even carry the
CCP driver, let's make our lives easier and just move the CCP device
node to the B1-only SSDT.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl | 23 ----
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc | 137 +++++---------------
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtB1.asl | 23 ++++
3 files changed, 56 insertions(+), 127 deletions(-)
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
index 3a3bdcad627e..6dc29758649e 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
@@ -266,29 +266,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3)
}
}
- Device (CCP0)
- {
- Name (_HID, "AMDI0C00") // _HID: Hardware ID
- Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0xE0100000, // Address Base
- 0x00010000, // Address Length
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000023, }
- })
-
- Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
- {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package ()
- {
- Package (0x02) {"amd,zlib-support", 1}
- }
- })
- }
-
//
// PCIe Root Bus
//
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
index d46be49f0318..8d8a2c693aa6 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
@@ -46,8 +46,14 @@ typedef struct {
typedef struct {
EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node;
CONST CHAR8 Name[11];
- EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[32];
-} STYX_NC_NODE;
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[16];
+} STYX_ETH_NODE;
+
+typedef struct {
+ EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node;
+ CONST CHAR8 Name[11];
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[3];
+} STYX_SATA_NODE;
typedef struct {
EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort;
@@ -55,14 +61,15 @@ typedef struct {
STYX_RC_NODE PciRcNode;
STYX_SMMU_NODE Eth0SmmuNode;
- STYX_NC_NODE Eth0NamedNode;
+ STYX_ETH_NODE Eth0NamedNode;
STYX_SMMU_NODE Eth1SmmuNode;
- STYX_NC_NODE Eth1NamedNode;
+ STYX_ETH_NODE Eth1NamedNode;
STYX_SMMU_NODE Sata0SmmuNode;
- STYX_NC_NODE Sata0NamedNode;
+ STYX_SATA_NODE Sata0NamedNode;
STYX_SMMU_NODE Sata1SmmuNode;
- STYX_NC_NODE Sata1NamedNode;
+ STYX_SATA_NODE Sata1NamedNode;
+ STYX_SATA_NODE CcpNamedNode;
} STYX_IO_REMAPPING_STRUCTURE;
#define __STYX_SMMU_NODE(Base, Size, Irq) \
@@ -114,15 +121,19 @@ typedef struct {
EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE \
}
-#define __STYX_NAMED_COMPONENT_NODE(Name) \
+#define __STYX_NUM_NODES(Type) \
+ ((sizeof(Type) - FIELD_OFFSET(Type, RcIdMapping)) / \
+ sizeof(EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE))
+
+#define __STYX_NAMED_COMPONENT_NODE(Name, Type) \
{ \
{ \
EFI_ACPI_IORT_TYPE_NAMED_COMP, \
- sizeof(STYX_NC_NODE), \
+ sizeof(Type), \
0x0, \
0x0, \
- 0x20, \
- FIELD_OFFSET(STYX_NC_NODE, RcIdMapping), \
+ __STYX_NUM_NODES(Type), \
+ FIELD_OFFSET(Type, RcIdMapping), \
}, \
0x0, \
EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, \
@@ -175,7 +186,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_ETH0_SMMU_INTERRUPT)
}, {
// Eth0NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH0"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH0", STYX_ETH_NODE),
{
__STYX_ID_MAPPING_SINGLE(0x00, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x01, Eth0SmmuNode),
@@ -185,14 +196,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x05, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x06, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x07, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0E, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0F, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x10, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x11, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x12, Eth0SmmuNode),
@@ -201,14 +204,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x15, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x16, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x17, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1E, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Eth0SmmuNode),
}
}, {
// Eth1SmmuNode
@@ -217,7 +212,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_ETH1_SMMU_INTERRUPT)
}, {
// Eth1NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH1"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH1", STYX_ETH_NODE),
{
__STYX_ID_MAPPING_SINGLE(0x00, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x01, Eth1SmmuNode),
@@ -227,14 +222,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x05, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x06, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x07, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0E, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0F, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x10, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x11, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x12, Eth1SmmuNode),
@@ -243,14 +230,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x15, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x16, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x17, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1E, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Eth1SmmuNode),
}
}, {
// Sata0SmmuNode
@@ -259,40 +238,11 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_SATA0_SMMU_INTERRUPT)
}, {
// Sata0NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC0"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC0", STYX_SATA_NODE),
{
- __STYX_ID_MAPPING_SINGLE(0x00, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x01, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x02, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x03, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x04, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x05, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x06, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x07, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0E, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0F, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x10, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x11, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x12, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x13, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x14, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x15, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x16, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x17, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x1E, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Sata0SmmuNode),
}
}, {
// Sata1SmmuNode
@@ -301,40 +251,19 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_SATA1_SMMU_INTERRUPT)
}, {
// Sata1NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC1"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC1", STYX_SATA_NODE),
{
- __STYX_ID_MAPPING_SINGLE(0x00, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x01, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x02, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x03, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x04, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x05, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x06, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x07, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0E, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0F, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x10, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x11, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x12, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x13, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x14, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x15, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x16, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x17, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x1E, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Sata1SmmuNode),
+ }
+ }, {
+ // CcpNamedNode
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.CCP0", STYX_SATA_NODE),
+ {
+ __STYX_ID_MAPPING_SINGLE(0x00, Sata1SmmuNode),
+ __STYX_ID_MAPPING_SINGLE(0x02, Sata1SmmuNode),
+ __STYX_ID_MAPPING_SINGLE(0x40, Sata1SmmuNode),
}
}
};
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtB1.asl b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtB1.asl
index 5c7e87181d10..d44bb9181d87 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtB1.asl
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtB1.asl
@@ -76,5 +76,28 @@ DefinitionBlock ("SsdtB1.aml", "SSDT", 2, "AMDINC", "StyxB1 ", 3)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x0000018D, }
})
}
+
+ Device (CCP0)
+ {
+ Name (_HID, "AMDI0C00") // _HID: Hardware ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xE0100000, // Address Base
+ 0x00010000, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000023, }
+ })
+
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
+ {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package ()
+ {
+ Package (0x02) {"amd,zlib-support", 1}
+ }
+ })
+ }
}
}
--
2.20.1
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