From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web11.10674.1574769900979979461 for ; Tue, 26 Nov 2019 04:05:01 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=makII9er; spf=pass (domain: linaro.org, ip: 209.85.221.65, mailfrom: leif.lindholm@linaro.org) Received: by mail-wr1-f65.google.com with SMTP id w9so22207221wrr.0 for ; Tue, 26 Nov 2019 04:05:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=2SeOHYsr2SpZ34Gic+9xTUMnCpnS+sVn0Dp6h1e01GU=; b=makII9erIQK2lXWL3LS8n7/td5zrj0bmxc2FSI+17NYmtxklN0axQ62YdQJEklZq3F HEw9HnWyefiaQKJelpdBVvKDd0raIqCrVSh3Q+T12a5hzp+nMpEvJCEgKCEm24LPvEuP T7nMDA3+COHYJtjLMZbHnWE6M8PqxdyCldihqEEBMHDdPxSKAkFCtnxJlfD2ZBMDC0x0 6/avwi7uhKQLxvcWEp0UQi/V4M60Td5uodjhVZ/JKw5ugl70cuCpAWmQTYNiGNIFkGPt 2QTQ5J7uoilSOx/upjYEXdYfQ6maHrZr8rUEFMCenO+Hs+P2qCXQqqhXZL+pp1HCi8Bk DUMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=2SeOHYsr2SpZ34Gic+9xTUMnCpnS+sVn0Dp6h1e01GU=; b=jelsNlwQ0YvdIC6Eh64V5MDN7iah57QE4OB5PnnwxCscyKAs5SqaPLq1EiIivge0w7 /+CuZQ6i0p0s+dOKA0CQ/9Ov/sNHQhkS43zv0E7TcTCYjlhH5o61LA6c+pFw8Z8ZkcO/ 8O17PiLxGqMBmyGHz7FFr/IwQ0QLFaSMq1c4P3qKYNIyhOf4Txq3ZJ3HtNqCYgfuptvt p78jQZwRfyY0Wtl2Q1FHj3llwGlJ7CL/Qt7VL7/s2cQuEVBdV+3AeBPykZLDNP5qE8bC 9qsNa3vrQoGco2iRmjV1z7ZqdQKGx7pYWQxI6Sb/P2+8YmQUiGKh9+0qG+6ZQWTzQ+K6 Nd9A== X-Gm-Message-State: APjAAAWaN52lCN9PNi1Sh8gGMJwrUu9oAseMK+mz2pvFxs8ZBIlA9k0V aEhHRn/Jl3/MIT87Ax4Bnprsz9nfOjc= X-Google-Smtp-Source: APXvYqwPmemFk8jRUheEouc1JDIbGoiRcHwWI4JgpzmR3MSPtM+xasfk11/LUdHHlTJyot2hKmWALQ== X-Received: by 2002:adf:e2cc:: with SMTP id d12mr35179445wrj.168.1574769898915; Tue, 26 Nov 2019 04:04:58 -0800 (PST) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 189sm2844848wmc.7.2019.11.26.04.04.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2019 04:04:58 -0800 (PST) Date: Tue, 26 Nov 2019 12:04:56 +0000 From: "Leif Lindholm" To: Ard Biesheuvel Cc: devel@edk2.groups.io Subject: Re: [PATCH v2 1/2] EmbeddedPkg/NonCoherentDmaLib: implement support for DMA range limits Message-ID: <20191126120456.GV7359@bivouac.eciton.net> References: <20191125231242.12193-1-ard.biesheuvel@linaro.org> <20191125231242.12193-2-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20191125231242.12193-2-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Nov 26, 2019 at 00:12:41 +0100, Ard Biesheuvel wrote: > Implement support for driving peripherals with limited DMA ranges to > NonCoherentDmaLib, by adding a device address limit, and taking it, > along with the device offset, into account when allocating or mapping > DMA buffers. > > Signed-off-by: Ard Biesheuvel > --- > EmbeddedPkg/EmbeddedPkg.dec | 6 + > EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c | 165 ++++++++++++++++++-- > EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf | 1 + > 3 files changed, 160 insertions(+), 12 deletions(-) > > diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec > index 8812a6db7c30..69922802f473 100644 > --- a/EmbeddedPkg/EmbeddedPkg.dec > +++ b/EmbeddedPkg/EmbeddedPkg.dec > @@ -186,6 +186,12 @@ [PcdsFixedAtBuild.common, PcdsDynamic.common] > # > gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset|0x0|UINT64|0x0000058 > > + # > + # Highest address value supported by the device for DMA addressing. Note > + # that this value should be strictly greater than PcdDmaDeviceOffset. > + # > + gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit|0xFFFFFFFFFFFFFFFF|UINT64|0x000005A > + > # > # Selection between DT and ACPI as a default > # > diff --git a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c > index 78220f6358aa..115345765435 100644 > --- a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c > +++ b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c > @@ -40,6 +40,8 @@ typedef struct { > STATIC EFI_CPU_ARCH_PROTOCOL *mCpu; > STATIC LIST_ENTRY UncachedAllocationList; > > +STATIC PHYSICAL_ADDRESS mDmaHostAddressLimit; > + > STATIC > PHYSICAL_ADDRESS > HostToDeviceAddress ( > @@ -49,6 +51,102 @@ HostToDeviceAddress ( > return (PHYSICAL_ADDRESS)(UINTN)Address + PcdGet64 (PcdDmaDeviceOffset); > } > > +/** > + Allocates one or more 4KB pages of a certain memory type at a specified > + alignment. > + > + Allocates the number of 4KB pages specified by Pages of a certain memory type > + with an alignment specified by Alignment. The allocated buffer is returned. > + If Pages is 0, then NULL is returned. If there is not enough memory at the > + specified alignment remaining to satisfy the request, then NULL is returned. > + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). > + If Pages plus EFI_SIZE_TO_PAGES (Alignment) overflows, then ASSERT(). > + > + @param MemoryType The type of memory to allocate. > + @param Pages The number of 4 KB pages to allocate. > + @param Alignment The requested alignment of the allocation. > + Must be a power of two. > + If Alignment is zero, then byte alignment is > + used. > + > + @return A pointer to the allocated buffer or NULL if allocation fails. > + > +**/ > +STATIC > +VOID * > +InternalAllocateAlignedPages ( > + IN EFI_MEMORY_TYPE MemoryType, > + IN UINTN Pages, > + IN UINTN Alignment > + ) > +{ > + EFI_STATUS Status; > + EFI_PHYSICAL_ADDRESS Memory; > + UINTN AlignedMemory; > + UINTN AlignmentMask; > + UINTN UnalignedPages; > + UINTN RealPages; > + > + // > + // Alignment must be a power of two or zero. > + // > + ASSERT ((Alignment & (Alignment - 1)) == 0); Sorry, slight mental glitch (and I realise this is in copied code) - the above also matches for an Alignment of 1, which contradicts the comment. Clearly requesting allocation explicitly aligned to 1 is a) silly, b) the same as what happens for any value <= EFI_PAGE_SIZE in the below code, and c) harmless, but could you update the comment? If so: Acked-by: Leif Lindholm / Leif > + > + if (Pages == 0) { > + return NULL; > + } > + if (Alignment > EFI_PAGE_SIZE) { > + // > + // Calculate the total number of pages since alignment is larger than page > + // size. > + // > + AlignmentMask = Alignment - 1; > + RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment); > + // > + // Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not > + // overflow. > + // > + ASSERT (RealPages > Pages); > + > + Memory = mDmaHostAddressLimit; > + Status = gBS->AllocatePages (AllocateMaxAddress, MemoryType, RealPages, > + &Memory); > + if (EFI_ERROR (Status)) { > + return NULL; > + } > + AlignedMemory = ((UINTN)Memory + AlignmentMask) & ~AlignmentMask; > + UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN)Memory); > + if (UnalignedPages > 0) { > + // > + // Free first unaligned page(s). > + // > + Status = gBS->FreePages (Memory, UnalignedPages); > + ASSERT_EFI_ERROR (Status); > + } > + Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages); > + UnalignedPages = RealPages - Pages - UnalignedPages; > + if (UnalignedPages > 0) { > + // > + // Free last unaligned page(s). > + // > + Status = gBS->FreePages (Memory, UnalignedPages); > + ASSERT_EFI_ERROR (Status); > + } > + } else { > + // > + // Do not over-allocate pages in this case. > + // > + Memory = mDmaHostAddressLimit; > + Status = gBS->AllocatePages (AllocateMaxAddress, MemoryType, Pages, > + &Memory); > + if (EFI_ERROR (Status)) { > + return NULL; > + } > + AlignedMemory = (UINTN)Memory; > + } > + return (VOID *)AlignedMemory; > +} > + > /** > Provides the DMA controller-specific addresses needed to access system memory. > > @@ -111,7 +209,30 @@ DmaMap ( > return EFI_OUT_OF_RESOURCES; > } > > - if (Operation != MapOperationBusMasterRead && > + if (((UINTN)HostAddress + *NumberOfBytes) > mDmaHostAddressLimit) { > + > + if (Operation == MapOperationBusMasterCommonBuffer) { > + goto CommonBufferError; > + } > + > + AllocSize = ALIGN_VALUE (*NumberOfBytes, mCpu->DmaBufferAlignment); > + Map->BufferAddress = InternalAllocateAlignedPages (EfiBootServicesData, > + EFI_SIZE_TO_PAGES (AllocSize), > + mCpu->DmaBufferAlignment); > + if (Map->BufferAddress == NULL) { > + Status = EFI_OUT_OF_RESOURCES; > + goto FreeMapInfo; > + } > + > + if (Map->Operation == MapOperationBusMasterRead) { > + CopyMem (Map->BufferAddress, (VOID *)(UINTN)Map->HostAddress, > + *NumberOfBytes); > + } > + mCpu->FlushDataCache (mCpu, (UINTN)Map->BufferAddress, AllocSize, > + EfiCpuFlushTypeWriteBack); > + > + *DeviceAddress = HostToDeviceAddress (Map->BufferAddress); > + } else if (Operation != MapOperationBusMasterRead && > ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) || > ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0))) { > > @@ -128,12 +249,7 @@ DmaMap ( > // on uncached buffers. > // > if (Operation == MapOperationBusMasterCommonBuffer) { > - DEBUG ((DEBUG_ERROR, > - "%a: Operation type 'MapOperationBusMasterCommonBuffer' is only " > - "supported\non memory regions that were allocated using " > - "DmaAllocateBuffer ()\n", __FUNCTION__)); > - Status = EFI_UNSUPPORTED; > - goto FreeMapInfo; > + goto CommonBufferError; > } > > // > @@ -199,6 +315,12 @@ DmaMap ( > > return EFI_SUCCESS; > > +CommonBufferError: > + DEBUG ((DEBUG_ERROR, > + "%a: Operation type 'MapOperationBusMasterCommonBuffer' is only " > + "supported\non memory regions that were allocated using " > + "DmaAllocateBuffer ()\n", __FUNCTION__)); > + Status = EFI_UNSUPPORTED; > FreeMapInfo: > FreePool (Map); > > @@ -229,6 +351,7 @@ DmaUnmap ( > MAP_INFO_INSTANCE *Map; > EFI_STATUS Status; > VOID *Buffer; > + UINTN AllocSize; > > if (Mapping == NULL) { > ASSERT (FALSE); > @@ -238,7 +361,17 @@ DmaUnmap ( > Map = (MAP_INFO_INSTANCE *)Mapping; > > Status = EFI_SUCCESS; > - if (Map->DoubleBuffer) { > + if (((UINTN)Map->HostAddress + Map->NumberOfBytes) > mDmaHostAddressLimit) { > + AllocSize = ALIGN_VALUE (Map->NumberOfBytes, mCpu->DmaBufferAlignment); > + if (Map->Operation == MapOperationBusMasterWrite) { > + mCpu->FlushDataCache (mCpu, (UINTN)Map->BufferAddress, AllocSize, > + EfiCpuFlushTypeInvalidate); > + CopyMem ((VOID *)(UINTN)Map->HostAddress, Map->BufferAddress, > + Map->NumberOfBytes); > + } > + FreePages (Map->BufferAddress, EFI_SIZE_TO_PAGES (AllocSize)); > + } else if (Map->DoubleBuffer) { > + > ASSERT (Map->Operation == MapOperationBusMasterWrite); > > if (Map->Operation != MapOperationBusMasterWrite) { > @@ -335,10 +468,9 @@ DmaAllocateAlignedBuffer ( > return EFI_INVALID_PARAMETER; > } > > - if (MemoryType == EfiBootServicesData) { > - Allocation = AllocateAlignedPages (Pages, Alignment); > - } else if (MemoryType == EfiRuntimeServicesData) { > - Allocation = AllocateAlignedRuntimePages (Pages, Alignment); > + if (MemoryType == EfiBootServicesData || > + MemoryType == EfiRuntimeServicesData) { > + Allocation = InternalAllocateAlignedPages (MemoryType, Pages, Alignment); > } else { > return EFI_INVALID_PARAMETER; > } > @@ -479,6 +611,15 @@ NonCoherentDmaLibConstructor ( > { > InitializeListHead (&UncachedAllocationList); > > + // > + // Ensure that the combination of DMA addressing offset and limit produces > + // a sane value. > + // > + ASSERT (PcdGet64 (PcdDmaDeviceLimit) > PcdGet64 (PcdDmaDeviceOffset)); > + > + mDmaHostAddressLimit = PcdGet64 (PcdDmaDeviceLimit) - > + PcdGet64 (PcdDmaDeviceOffset); > + > // Get the Cpu protocol for later use > return gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu); > } > diff --git a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf > index 2db751afee91..1a21cfe4ff23 100644 > --- a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf > +++ b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf > @@ -38,6 +38,7 @@ [Protocols] > > [Pcd] > gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset > + gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit > > [Depex] > gEfiCpuArchProtocolGuid > -- > 2.17.1 >