From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web11.14840.1574787323000071638 for ; Tue, 26 Nov 2019 08:55:23 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=tNvH/g/j; spf=pass (domain: linaro.org, ip: 209.85.221.65, mailfrom: leif.lindholm@linaro.org) Received: by mail-wr1-f65.google.com with SMTP id b18so23317171wrj.8 for ; Tue, 26 Nov 2019 08:55:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=TR5Azl0eurRsHxYvK27LumLCWtFCeLPXHZqNjYAH7Po=; b=tNvH/g/jrCPuor5m9Jhi75kCCAiEE33DqA0rPl9cG5GqCj93yGhTzmmiQ0Mr3TAvuS bJJB1QNT6PiEfG34R1XgsQ0khxdOstCkqyH8CwIT6REUrbfWH/JZabCYbqY2q/AJ2m4X R9q+tTUUpn1HVOOCHRBHAJOQwQPaoRyZlPdv/5RC87bZl7M077DWhHOzo6ZD38SDC0Gx prEZ6oTScII7/ef+YHIW9Ku8Tk5K8bEOTyZd52WuStmLRPRpBTTTRupYi/HZdm9hF7UM zVynUcp845j/j0UAKN7CtvMn3s7kAY8fNpoI9V2D2h8oUTs30fmqQ8fZkvqjeOuz5+Ed YmrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=TR5Azl0eurRsHxYvK27LumLCWtFCeLPXHZqNjYAH7Po=; b=lft+BHOaDxe26Cc3Tz2zac4bo/M+bgPeSixPVV16fDPy4PuY9/nxOsm/d5sopo0Tlp vHcvHxhCVPgMDW2sw8yodVF2j0kC0gS1QvTD4KaIcrj6WYASWSzcGZfGrM42aUh7RYpv CfFj1UFAY6xdLq4HPxI9obchY/P0cXnPzxpPmXo2gybOtQHOwdgVvTvKVFeYaG5p+uVL eew/DvAKmEdIjk2WCqbdoTz43xrM14mvfh0iE1ipfIu2Vww9ICIvZCZmwHN3ZK5/I/M9 daQKUugOmuDa/J0TorZWA6qmiLCmGqxs8+mpyDffbPTLrjY1iiUxqz0+zLnB9KLq25r8 e27g== X-Gm-Message-State: APjAAAUBTMnoqeiMrnJd6plGbXJ+jeBOiD1msd8Mm8j7e51ls4V6Y6Qm 6MwZbDIeduJ32xfASXWtbeIk6kRpkJk= X-Google-Smtp-Source: APXvYqzpRNtXHHoAD+uoGugoIbOyyr4n2mnQGm5L3PzzZeEobcJIpOF3FX6fAyC6GRRm3QbxxiVq4w== X-Received: by 2002:a5d:6144:: with SMTP id y4mr23885007wrt.15.1574787321114; Tue, 26 Nov 2019 08:55:21 -0800 (PST) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id c12sm15365072wro.96.2019.11.26.08.55.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2019 08:55:20 -0800 (PST) Date: Tue, 26 Nov 2019 16:55:19 +0000 From: "Leif Lindholm" To: devel@edk2.groups.io, meenakshi.aggarwal@nxp.com Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, v.sethi@nxp.com Subject: Re: [edk2-devel] [edk2-platforms] [PATCH v2 07/11] Silicon/NXP : Add MemoryInitPei Library Message-ID: <20191126165519.GE7359@bivouac.eciton.net> References: <1570639758-30355-1-git-send-email-meenakshi.aggarwal@nxp.com> <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> <1574353514-23986-8-git-send-email-meenakshi.aggarwal@nxp.com> MIME-Version: 1.0 In-Reply-To: <1574353514-23986-8-git-send-email-meenakshi.aggarwal@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Nov 21, 2019 at 21:55:10 +0530, Meenakshi Aggarwal wrote: > Add MemoryInitPei Library for NXP platforms. > It has changes to get DRAM information from TFA. > Only the feedback on the commit message has been addressed (but the message is now fine). There were several more comments on this patch. Please revisit and resubmit. Best Regards, Leif > Signed-off-by: Meenakshi Aggarwal > --- > Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf | 48 +++++++ > Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c | 139 ++++++++++++++++++++ > 2 files changed, 187 insertions(+) > > diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf > new file mode 100644 > index 000000000000..806da6d9ab9a > --- /dev/null > +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf > @@ -0,0 +1,48 @@ > +#/** @file > +# > +# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
> +# Copyright 2019 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010005 > + BASE_NAME = ArmMemoryInitPeiLib > + FILE_GUID = 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = MemoryInitPeiLib|SEC PEIM DXE_DRIVER > + > +[Sources] > + MemoryInitPeiLib.c > + > + > +[Packages] > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + Silicon/NXP/NxpQoriqLs.dec > + > +[LibraryClasses] > + DebugLib > + HobLib > + ArmMmuLib > + ArmPlatformLib > + PcdLib > + > +[Guids] > + gEfiMemoryTypeInformationGuid > + > +[FeaturePcd] > + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob > + > +[Pcd] > + gArmTokenSpaceGuid.PcdSystemMemoryBase > + gArmTokenSpaceGuid.PcdSystemMemorySize > + > +[Depex] > + TRUE > diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c > new file mode 100644 > index 000000000000..9889d5730261 > --- /dev/null > +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c > @@ -0,0 +1,139 @@ > +/** @file > +* > +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. > +* > +* Copyright 2019 NXP > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +* > +**/ > + > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +VOID > +BuildMemoryTypeInformationHob ( > + VOID > + ); > + > +VOID > +InitMmu ( > + IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable > + ) > +{ > + > + VOID *TranslationTableBase; > + UINTN TranslationTableSize; > + RETURN_STATUS Status; > + > + //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in > + // DRAM (even at the top of DRAM as it is the first permanent memory allocation) > + Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > + } > +} > + > +/*++ > + > +Routine Description: > + > + > + > +Arguments: > + > + FileHandle - Handle of the file being invoked. > + PeiServices - Describes the list of possible PEI Services. > + > +Returns: > + > + Status - EFI_SUCCESS if the boot mode could be set > + > +--*/ > +EFI_STATUS > +EFIAPI > +MemoryPeim ( > + IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, > + IN UINT64 UefiMemorySize > + ) > +{ > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > + EFI_PEI_HOB_POINTERS NextHob; > + BOOLEAN Found; > + DRAM_INFO DramInfo; > + > + // Get Virtual Memory Map from the Platform Library > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > + > + // > + // Ensure MemoryTable[0].Length which is size of DRAM has been set > + // by ArmPlatformGetVirtualMemoryMap () > + // > + ASSERT (MemoryTable[0].Length != 0); > + > + // > + // Now, the permanent memory has been installed, we can call AllocatePages() > + // > + ResourceAttributes = ( > + EFI_RESOURCE_ATTRIBUTE_PRESENT | > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_TESTED > + ); > + > + if (GetDramBankInfo (&DramInfo)) { > + DEBUG ((DEBUG_ERROR, "Failed to get DRAM information, exiting...\n")); > + return EFI_UNSUPPORTED; > + } > + > + while (DramInfo.NumOfDrams--) { > + // > + // Check if the resource for the main system memory has been declared > + // > + Found = FALSE; > + NextHob.Raw = GetHobList (); > + while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) { > + if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) && > + (DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress >= NextHob.ResourceDescriptor->PhysicalStart) && > + (NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength <= > + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress + DramInfo.DramRegion[DramInfo.NumOfDrams].Size)) > + { > + Found = TRUE; > + break; > + } > + NextHob.Raw = GET_NEXT_HOB (NextHob); > + } > + > + if (!Found) { > + // Reserved the memory space occupied by the firmware volume > + BuildResourceDescriptorHob ( > + EFI_RESOURCE_SYSTEM_MEMORY, > + ResourceAttributes, > + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress, > + DramInfo.DramRegion[DramInfo.NumOfDrams].Size > + ); > + } > + } > + > + // Build Memory Allocation Hob > + InitMmu (MemoryTable); > + > + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { > + // Optional feature that helps prevent EFI memory map fragmentation. > + BuildMemoryTypeInformationHob (); > + } > + > + return EFI_SUCCESS; > +} > -- > 1.9.1 > > > >