From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by mx.groups.io with SMTP id smtpd.web10.5435.1574858250144410117 for ; Wed, 27 Nov 2019 04:37:30 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@akeo-ie.20150623.gappssmtp.com header.s=20150623 header.b=tENOlkNw; spf=none, err=permanent DNS error (domain: akeo.ie, ip: 209.85.221.68, mailfrom: pete@akeo.ie) Received: by mail-wr1-f68.google.com with SMTP id z3so26476895wru.3 for ; Wed, 27 Nov 2019 04:37:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=akeo-ie.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YTCg81p8UJcDtN/E3Fo1FtEmR1fa5+hfI04QdfuhTXw=; b=tENOlkNwQMuKhaI1WITCdg+6R1/tBB1Nxwn/9nIjRkAPzNzk8jqLTc5ZFbL+IBHGbM Y+IGQPIwJlWQ++pYC6GkFuQaM52SVUfgr/a5spZl9FXTuzl8srAie21jKAKsc3esR8IT 73necMQ492cIkEfRZ49mYM6X6hbwwNrLmu5BowUXEAjfwX5b2ogI2JTphWpQ9D3iPANF HXqLbrhYy8I7aMbylNk1685LjhqY+LywtTELOoF6IM4qPLtMrQnXFPVDCNGRrDOn7II6 6k6aiSftchUbTZ2e52GbdERDJP4i2yn/uiqla2MLE09DgIMp2jpW4PrgXy2t5sj2avLr UFOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YTCg81p8UJcDtN/E3Fo1FtEmR1fa5+hfI04QdfuhTXw=; b=rKvAHvwlV8ZwY4Si68Lq7QFAO1gbl6Wp8clPQR0IWdp/RuEyRbD5hAyOo9zGYklEE9 noiVHBGJG1L9AfL4IsM4CoFI36J/7ZRS8gYdzZaKlQfEKQVV5Ki/Ii+uHdpNIdd2c7Yd hkxgHNZ09NlpzZQ2p+ulFhM9PFmgZ41r1+wh2CfP3qCN7syggs/dEVqPriQY+5NoA8YU YsnCX7mEqmeNaR5xYxZdnUbWPdx19ILdUHWsWMXiT0mYBnBicJThK8gw6o014BzT8FwO iq8g2SjWuNUBoGE8Gc2MBP+4WUBB3anZ+MvM+QUqbiq4z5d9IZ6XMNLUi+jDcsAXN2QP y2ug== X-Gm-Message-State: APjAAAXHn09V3WbK6ityyUvxx+CWlvWs5FjRarxouo7DAOpUkLFBgXEk cPJcImSdwb1GpCDoS1RfdBdZLS8JfqQ= X-Google-Smtp-Source: APXvYqzQh1lj1aBmdy6KioOTBBryt+VS/JEvef3wPWWnL9QoayCYqUXyc1nRWuVTv38HPofSFVXPUA== X-Received: by 2002:adf:e3c1:: with SMTP id k1mr1660166wrm.151.1574858248384; Wed, 27 Nov 2019 04:37:28 -0800 (PST) Return-Path: Received: from localhost.localdomain ([84.203.37.1]) by smtp.gmail.com with ESMTPSA id p9sm18847833wrs.55.2019.11.27.04.37.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Nov 2019 04:37:27 -0800 (PST) From: "Pete Batard" To: devel@edk2.groups.io Cc: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, philmd@redhat.com, samer.el-haj-mahmoud@arm.com, andrey.warkentin@gmail.com Subject: [edk2-platforms][PATCH 5/5] Platform/RPi: Set SD routing according to model Date: Wed, 27 Nov 2019 12:37:06 +0000 Message-Id: <20191127123706.4604-6-pete@akeo.ie> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20191127123706.4604-1-pete@akeo.ie> References: <20191127123706.4604-1-pete@akeo.ie> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Samer El-Haj-Mahmoud The Raspberry Pi 4 has a new SD controller. As a result we must handle SD routing according to the model, which we perform in the Config driver by using the GetModelFamily () call that was recently introduced. Signed-off-by: Pete Batard --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 137 ++++++++++++++------ 1 file changed, 96 insertions(+), 41 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index 98e58a560ed4..26bc92f28185 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -1,6 +1,7 @@ /** @file * - * Copyright (c) 2018, Andrei Warkentin + * Copyright (c) 2019, ARM Limited. All rights reserved. + * Copyright (c) 2018 - 2019, Andrei Warkentin * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -9,10 +10,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -212,6 +215,7 @@ ApplyVariables ( UINT32 CpuClock = PcdGet32 (PcdCpuClock); UINT32 CustomCpuClock = PcdGet32 (PcdCustomCpuClock); UINT32 Rate = 0; + UINT32 ModelFamily = 0; if (CpuClock != 0) { if (CpuClock == 2) { @@ -245,51 +249,102 @@ ApplyVariables ( DEBUG ((DEBUG_INFO, "Current CPU speed is %uHz\n", Rate)); } - /* - * Switching two groups around, so disable both first. - * - * No, I've not seen a problem, but having a group be - * routed to two sets of pins seems like asking for trouble. - */ - GpioPinFuncSet (34, GPIO_FSEL_INPUT); - GpioPinFuncSet (35, GPIO_FSEL_INPUT); - GpioPinFuncSet (36, GPIO_FSEL_INPUT); - GpioPinFuncSet (37, GPIO_FSEL_INPUT); - GpioPinFuncSet (38, GPIO_FSEL_INPUT); - GpioPinFuncSet (39, GPIO_FSEL_INPUT); - GpioPinFuncSet (48, GPIO_FSEL_INPUT); - GpioPinFuncSet (49, GPIO_FSEL_INPUT); - GpioPinFuncSet (50, GPIO_FSEL_INPUT); - GpioPinFuncSet (51, GPIO_FSEL_INPUT); - GpioPinFuncSet (52, GPIO_FSEL_INPUT); - GpioPinFuncSet (53, GPIO_FSEL_INPUT); - if (PcdGet32 (PcdSdIsArasan)) { - DEBUG ((DEBUG_INFO, "Routing SD to Arasan\n")); - Gpio48Group = GPIO_FSEL_ALT3; + Status = mFwProtocol->GetModelFamily (&ModelFamily); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi model family: %r\n", Status)); + } else { + DEBUG ((DEBUG_INFO, "Current Raspberry Pi model family is 0x%x\n", ModelFamily)); + } + + + if (ModelFamily == 3) { /* - * Route SDIO to SdHost. + * Pi 3: either Arasan or SdHost goes to SD card. + * + * Switching two groups around, so disable both first. + * + * No, I've not seen a problem, but having a group be + * routed to two sets of pins seems like asking for trouble. */ - Gpio34Group = GPIO_FSEL_ALT0; - } else { - DEBUG ((DEBUG_INFO, "Routing SD to SdHost\n")); - Gpio48Group = GPIO_FSEL_ALT0; + GpioPinFuncSet (34, GPIO_FSEL_INPUT); + GpioPinFuncSet (35, GPIO_FSEL_INPUT); + GpioPinFuncSet (36, GPIO_FSEL_INPUT); + GpioPinFuncSet (37, GPIO_FSEL_INPUT); + GpioPinFuncSet (38, GPIO_FSEL_INPUT); + GpioPinFuncSet (39, GPIO_FSEL_INPUT); + GpioPinFuncSet (48, GPIO_FSEL_INPUT); + GpioPinFuncSet (49, GPIO_FSEL_INPUT); + GpioPinFuncSet (50, GPIO_FSEL_INPUT); + GpioPinFuncSet (51, GPIO_FSEL_INPUT); + GpioPinFuncSet (52, GPIO_FSEL_INPUT); + GpioPinFuncSet (53, GPIO_FSEL_INPUT); + + if (PcdGet32 (PcdSdIsArasan)) { + DEBUG ((DEBUG_INFO, "Routing SD to Arasan\n")); + Gpio48Group = GPIO_FSEL_ALT3; + /* + * Route SDIO to SdHost. + */ + Gpio34Group = GPIO_FSEL_ALT0; + } else { + DEBUG ((DEBUG_INFO, "Routing SD to SdHost\n")); + Gpio48Group = GPIO_FSEL_ALT0; + /* + * Route SDIO to Arasan. + */ + Gpio34Group = GPIO_FSEL_ALT3; + } + GpioPinFuncSet (34, Gpio34Group); + GpioPinFuncSet (35, Gpio34Group); + GpioPinFuncSet (36, Gpio34Group); + GpioPinFuncSet (37, Gpio34Group); + GpioPinFuncSet (38, Gpio34Group); + GpioPinFuncSet (39, Gpio34Group); + GpioPinFuncSet (48, Gpio48Group); + GpioPinFuncSet (49, Gpio48Group); + GpioPinFuncSet (50, Gpio48Group); + GpioPinFuncSet (51, Gpio48Group); + GpioPinFuncSet (52, Gpio48Group); + GpioPinFuncSet (53, Gpio48Group); + + } else if (ModelFamily == 4){ /* - * Route SDIO to Arasan. + * Pi 4: either Arasan or eMMC2 goes to SD card. */ - Gpio34Group = GPIO_FSEL_ALT3; + if (PcdGet32 (PcdSdIsArasan)) { + /* + * WiFi disabled. + */ + GpioPinFuncSet (34, GPIO_FSEL_INPUT); + GpioPinFuncSet (35, GPIO_FSEL_INPUT); + GpioPinFuncSet (36, GPIO_FSEL_INPUT); + GpioPinFuncSet (37, GPIO_FSEL_INPUT); + GpioPinFuncSet (38, GPIO_FSEL_INPUT); + GpioPinFuncSet (39, GPIO_FSEL_INPUT); + /* + * SD card pins go to Arasan. + */ + MmioWrite32((GPIO_BASE_ADDRESS + 0xD0), + MmioRead32(GPIO_BASE_ADDRESS + 0xD0) | 0x2); + } else { + /* + * SD card pins back to eMMC2. + */ + MmioWrite32((GPIO_BASE_ADDRESS + 0xD0), + MmioRead32(GPIO_BASE_ADDRESS + 0xD0) & ~0x2); + /* + * WiFi back to Arasan. + */ + GpioPinFuncSet (34, GPIO_FSEL_ALT3); + GpioPinFuncSet (35, GPIO_FSEL_ALT3); + GpioPinFuncSet (36, GPIO_FSEL_ALT3); + GpioPinFuncSet (37, GPIO_FSEL_ALT3); + GpioPinFuncSet (38, GPIO_FSEL_ALT3); + GpioPinFuncSet (39, GPIO_FSEL_ALT3); + } + } else { + DEBUG ((DEBUG_ERROR, "Model Family %d not supported...\n", ModelFamily)); } - GpioPinFuncSet (34, Gpio34Group); - GpioPinFuncSet (35, Gpio34Group); - GpioPinFuncSet (36, Gpio34Group); - GpioPinFuncSet (37, Gpio34Group); - GpioPinFuncSet (38, Gpio34Group); - GpioPinFuncSet (39, Gpio34Group); - GpioPinFuncSet (48, Gpio48Group); - GpioPinFuncSet (49, Gpio48Group); - GpioPinFuncSet (50, Gpio48Group); - GpioPinFuncSet (51, Gpio48Group); - GpioPinFuncSet (52, Gpio48Group); - GpioPinFuncSet (53, Gpio48Group); /* * JTAG pin JTAG sig GPIO Mode Header pin -- 2.21.0.windows.1