From: "Ard Biesheuvel" <ard.biesheuvel@linaro.org>
To: devel@edk2.groups.io
Cc: leif.lindholm@linaro.org, Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v2 4/8] Silicon/AMD/Styx: clean up stream ID mappings for SMMU
Date: Wed, 27 Nov 2019 19:44:35 +0100 [thread overview]
Message-ID: <20191127184439.16793-5-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20191127184439.16793-1-ard.biesheuvel@linaro.org>
Tighten the stream ID mappings for the SMMU to only cover the stream IDs
that are actually being issued by the respective masters. This is
mostly just a cleanup exercise, since specifying unused stream IDs does
not typically create any problems. However, the CCP crypto accelerator
on B1 silicon actually uses stream IDs that we assigned to the second
SATA controller, so there this actually fixes a problem.
Since the crypto accelerator shares its SMMU with the second AHCI
controller, we can drop the logic that hides the associated IORT
node when running on B0 silicon.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 5 -
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc | 117 ++++----------------
2 files changed, 22 insertions(+), 100 deletions(-)
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
index 743ef0f65523..7c267542db19 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
@@ -123,7 +123,6 @@ InstallSystemDescriptionTables (
UINTN TableSize;
UINTN TableHandle;
EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE *Gtdt;
- EFI_ACPI_6_0_IO_REMAPPING_TABLE *Iort;
EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
EFI_ACPI_5_1_GIC_STRUCTURE *GicC;
UINT8 MacPackage[sizeof(mDefaultMacPackageA)];
@@ -177,10 +176,6 @@ InstallSystemDescriptionTables (
if (!PcdGetBool (PcdEnableSmmus)) {
continue;
}
- if ((CpuId & STYX_SOC_VERSION_MASK) < STYX_SOC_VERSION_B1) {
- Iort = (EFI_ACPI_6_0_IO_REMAPPING_TABLE *)Table;
- Iort->NumNodes -= 2;
- }
break;
case EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE:
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
index d46be49f0318..7bdc34f6737e 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc
@@ -46,7 +46,7 @@ typedef struct {
typedef struct {
EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node;
CONST CHAR8 Name[11];
- EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[32];
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[16];
} STYX_NC_NODE;
typedef struct {
@@ -63,6 +63,7 @@ typedef struct {
STYX_NC_NODE Sata0NamedNode;
STYX_SMMU_NODE Sata1SmmuNode;
STYX_NC_NODE Sata1NamedNode;
+ STYX_NC_NODE CcpNamedNode;
} STYX_IO_REMAPPING_STRUCTURE;
#define __STYX_SMMU_NODE(Base, Size, Irq) \
@@ -114,14 +115,18 @@ typedef struct {
EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE \
}
-#define __STYX_NAMED_COMPONENT_NODE(Name) \
+#define __STYX_NUM_NODES(Type) \
+ ((sizeof(Type) - FIELD_OFFSET(Type, RcIdMapping)) / \
+ sizeof(EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE))
+
+#define __STYX_NAMED_COMPONENT_NODE(Name, Num) \
{ \
{ \
EFI_ACPI_IORT_TYPE_NAMED_COMP, \
sizeof(STYX_NC_NODE), \
0x0, \
0x0, \
- 0x20, \
+ Num, \
FIELD_OFFSET(STYX_NC_NODE, RcIdMapping), \
}, \
0x0, \
@@ -139,7 +144,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
AMD_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
STYX_IO_REMAPPING_STRUCTURE,
EFI_ACPI_IO_REMAPPING_TABLE_REVISION),
- 10, // NumNodes
+ 11, // NumNodes
sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset
0 // Reserved
}, {
@@ -175,7 +180,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_ETH0_SMMU_INTERRUPT)
}, {
// Eth0NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH0"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH0", 16),
{
__STYX_ID_MAPPING_SINGLE(0x00, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x01, Eth0SmmuNode),
@@ -185,14 +190,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x05, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x06, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x07, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0E, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0F, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x10, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x11, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x12, Eth0SmmuNode),
@@ -201,14 +198,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x15, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x16, Eth0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x17, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1E, Eth0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Eth0SmmuNode),
}
}, {
// Eth1SmmuNode
@@ -217,7 +206,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_ETH1_SMMU_INTERRUPT)
}, {
// Eth1NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH1"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH1", 16),
{
__STYX_ID_MAPPING_SINGLE(0x00, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x01, Eth1SmmuNode),
@@ -227,14 +216,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x05, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x06, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x07, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0E, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0F, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x10, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x11, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x12, Eth1SmmuNode),
@@ -243,14 +224,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
__STYX_ID_MAPPING_SINGLE(0x15, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x16, Eth1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x17, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1E, Eth1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Eth1SmmuNode),
}
}, {
// Sata0SmmuNode
@@ -259,40 +232,14 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_SATA0_SMMU_INTERRUPT)
}, {
// Sata0NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC0"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC0", 6),
{
- __STYX_ID_MAPPING_SINGLE(0x00, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x01, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x02, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x03, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x04, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x05, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x06, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x07, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0A, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0B, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0E, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0F, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x10, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x11, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x12, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x13, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x14, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x15, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x16, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x17, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x1A, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Sata0SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x1E, Sata0SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Sata0SmmuNode),
}
}, {
// Sata1SmmuNode
@@ -301,40 +248,20 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
STYX_SATA1_SMMU_INTERRUPT)
}, {
// Sata1NamedNode
- __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC1"),
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC1", 3),
{
- __STYX_ID_MAPPING_SINGLE(0x00, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x01, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x02, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x03, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x04, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x05, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x06, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x07, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x08, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x09, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0A, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0B, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0C, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x0D, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0E, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x0F, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x10, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x11, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x12, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x13, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x14, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x15, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x16, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x17, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x18, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x19, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1A, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1B, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1C, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1D, Sata1SmmuNode),
__STYX_ID_MAPPING_SINGLE(0x1E, Sata1SmmuNode),
- __STYX_ID_MAPPING_SINGLE(0x1F, Sata1SmmuNode),
+ }
+ }, {
+ // CcpNamedNode
+ __STYX_NAMED_COMPONENT_NODE("\\_SB_.CCP0", 4),
+ {
+ __STYX_ID_MAPPING_SINGLE(0x00, Sata1SmmuNode),
+ __STYX_ID_MAPPING_SINGLE(0x02, Sata1SmmuNode),
+ __STYX_ID_MAPPING_SINGLE(0x40, Sata1SmmuNode),
+ __STYX_ID_MAPPING_SINGLE(0x42, Sata1SmmuNode),
}
}
};
--
2.17.1
next prev parent reply other threads:[~2019-11-27 18:44 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-27 18:44 [PATCH edk2-platforms v2 0/8] fixes and updates for AMD OverDrive Ard Biesheuvel
2019-11-27 18:44 ` [PATCH edk2-platforms v2 1/8] Platform/Overdrive: add missing resolution for FileHandleLib Ard Biesheuvel
2019-11-27 18:44 ` [PATCH edk2-platforms v2 2/8] Platform/Overdrive: clean up stream ID descriptions in DT Ard Biesheuvel
2019-11-27 18:44 ` [PATCH edk2-platforms v2 3/8] Platform/Overdrive: fix a typo in the DT Ard Biesheuvel
2019-11-28 12:32 ` Leif Lindholm
2019-11-28 13:32 ` Ard Biesheuvel
2019-11-27 18:44 ` Ard Biesheuvel [this message]
2019-11-27 18:44 ` [PATCH edk2-platforms v2 5/8] Silicon/AMD/StyxDtbLoaderLib: add interrupt-affinity property to PMU node Ard Biesheuvel
2019-11-28 13:22 ` Leif Lindholm
2019-11-28 13:29 ` Ard Biesheuvel
2019-11-27 18:44 ` [PATCH edk2-platforms v2 6/8] Silicon/AMD/StyxDtbLoaderLib: add description of the cache topology Ard Biesheuvel
2019-11-28 13:24 ` Leif Lindholm
2019-11-27 18:44 ` [PATCH edk2-platforms v2 7/8] Silicon/AMD/StyxDtbLoaderLib: use Cortex-A57 IDs instead of generic ARMv8 Ard Biesheuvel
2019-11-28 13:37 ` Leif Lindholm
2019-11-28 13:39 ` Ard Biesheuvel
2019-11-28 13:40 ` Leif Lindholm
2019-11-28 15:07 ` Ard Biesheuvel
2019-11-27 18:44 ` [PATCH edk2-platforms v2 8/8] Silicon/AMD/StyxDtbLoaderLib: omit linux,phandle properties Ard Biesheuvel
2019-11-28 13:38 ` Leif Lindholm
2019-11-28 15:48 ` [PATCH edk2-platforms v2 0/8] fixes and updates for AMD OverDrive Ard Biesheuvel
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