From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by mx.groups.io with SMTP id smtpd.web12.13081.1575908117664798093 for ; Mon, 09 Dec 2019 08:15:17 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=QubyUwBj; spf=pass (domain: linaro.org, ip: 209.85.128.67, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wm1-f67.google.com with SMTP id g206so16135756wme.1 for ; Mon, 09 Dec 2019 08:15:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qQQPBarUXqYqrZgfkz7q/2UuTyZlekDhR2eblf/MuKA=; b=QubyUwBjSGO42UWBva2nOKVrEkKxMMDuaL9kaqfdx5AEuKh09uBOve7OoeNk4kr1WR FXRM7xfR/3V/MsR8Ti7Cbq9BiO72S7w0micr/BZoj/vYEBzTyQ7UvpS5WewM+jTFgUUu BP2Vnn/gD59T+FnISrQG8vX03Cmmsi1p01jHimxBHP65w4WReKeJxcQuNWJOjlvtdcS3 hWvEWgk0byssf6+FRKDesJeF8JMMPcnNDnl3QLJd4oviF+uEmc8P+YkObI0oJ9GBXY90 lHFe81tBqvDrmqVw7+lvW+KIGDmvInlRKU1eAv/oS4od0meF69RMUWerVFpN0dDqa0cU iGOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qQQPBarUXqYqrZgfkz7q/2UuTyZlekDhR2eblf/MuKA=; b=QjKGh6wSSK8bFKiY11anPCH1sR59oglfAmFH63Rnd0CYKhct/u10xLYHNswCoYhXv5 VgiBCmyxAfy80D0GH1PBW4E7gfR4RldezBIXBfjcMJEefAA6Mjcp7vyGq1IJ46CV7F2C 4P7R+8+8e09WWoN8KiyPiF88Ur7/q5CwdjzdUCAMre+NoJGOgvlKmonHUIEgvVLXJQdd iFrpl+P8AyKbdOWJ+Y43KV6aXpm+9FaNMwEbzm2Sw/jF5Hpwt3QdG6YolTd2vy8TRv8T bxspP8KZXWzaa9I+gDfWLDQriRzzM54ei9M6XjGDNgCVfMaKFSv5VD006C8bIUOv2d1C n9oA== X-Gm-Message-State: APjAAAWdD4Hyamz+sjZMxiby7oQSJiNh6UoQicboEVbj1gbZQC6GQ5j4 b3d8VwRTYJ5ZjBHYB1iEs3UiX/7S23RSb/Lo X-Google-Smtp-Source: APXvYqxsq2rezUETfXSS9QieCZF0DSQL7mRe6oyafJGi0je5Rn0OCeRNmD0jqzfr+VhVhZZfgdWn4Q== X-Received: by 2002:a1c:610b:: with SMTP id v11mr25684093wmb.101.1575908115992; Mon, 09 Dec 2019 08:15:15 -0800 (PST) Return-Path: Received: from e123331-lin.home (amontpellier-657-1-18-247.w109-210.abo.wanadoo.fr. [109.210.65.247]) by smtp.gmail.com with ESMTPSA id x11sm199591wmg.46.2019.12.09.08.15.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2019 08:15:15 -0800 (PST) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, Ard Biesheuvel Subject: [PATCH edk2-platforms 1/3] Platform/Overdrive: revert streamID DT changes for first SATA port Date: Mon, 9 Dec 2019 17:15:19 +0100 Message-Id: <20191209161521.1986-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191209161521.1986-1-ard.biesheuvel@linaro.org> References: <20191209161521.1986-1-ard.biesheuvel@linaro.org> Commit 7a1cd6efbb483564dcf0ff3dda701bd09acf4b08 updated the stream ID assignment for various masters on the Seattle SoC, primarily to address a conflict between the second SATA port and the crypto accelerator on platforms that implement them (B1 silicon). Unfortunately, B0 variants turn out to exist where the stream ID assignment deviates from the observed assignment on the B0 Overdrive that I tested these changes on, leading to DMA access faults when using the first SATA port. Since that port does not share its SMMU with any other masters, let's revert the change to its stream ID assignment in the device tree, and switch back to matching the entire range [0x0, 0x1f]. Signed-off-by: Ard Biesheuvel --- Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.dts | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.dts b/Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.dts index a92ab695fb2e..a1575d0a623b 100644 --- a/Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.dts +++ b/Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.dts @@ -86,7 +86,7 @@ */ <0 332 4>, <0 332 4>; - #iommu-cells = <1>; + #iommu-cells = <2>; dma-coherent; }; @@ -109,12 +109,7 @@ interrupts = <0x0 0x163 0x4>; clocks = <&sata_clk>; dma-coherent; - iommus = <&sata0_smmu 0x0a>, - <&sata0_smmu 0x0b>, - <&sata0_smmu 0x0e>, - <&sata0_smmu 0x0f>, - <&sata0_smmu 0x1a>, - <&sata0_smmu 0x1e>; + iommus = <&sata0_smmu 0x0 0x1f>; }; sata@e0d00000 { -- 2.17.1