* [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 13:27 ` Philippe Mathieu-Daudé
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 2/7] Platform/RPi4: Clean up ACPI definitions Pete Batard
` (6 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
This adds offset, base address, interrupt and register-space length
for the 2 UARTs that the Bcm283x SoC provides.
To be consistent, we simplify the two other existing base address
definitions to a more legible equivalent since there is no point
in explicit refs to FixedPcdGet64 (PcdBcm283xRegistersAddress).
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
index 02107086d439..dd9a698f7218 100644
--- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
@@ -24,8 +24,7 @@
/* watchdog constants */
#define BCM2836_WDOG_OFFSET 0x00100000
-#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
- + BCM2836_WDOG_OFFSET)
+#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
#define BCM2836_WDOG_PASSWORD 0x5a000000
#define BCM2836_WDOG_RSTC_OFFSET 0x0000001c
#define BCM2836_WDOG_WDOG_OFFSET 0x00000024
@@ -34,8 +33,7 @@
/* mailbox interface constants */
#define BCM2836_MBOX_OFFSET 0x0000b880
-#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
- + BCM2836_MBOX_OFFSET)
+#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
#define BCM2836_MBOX_READ_OFFSET 0x00000000
#define BCM2836_MBOX_STATUS_OFFSET 0x00000018
#define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c
@@ -50,4 +48,15 @@
#define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x00000040
#define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060
+/* uart constants */
+#define BCM2836_PL011_UART_OFFSET 0x00201000
+#define BCM2836_PL011_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PL011_UART_OFFSET)
+#define BCM2836_PL011_UART_LENGTH 0x00001000
+#define BCM2836_PL011_UART_INTERRUPT 0x99
+
+#define BCM2836_MINI_UART_OFFSET 0x00215000
+#define BCM2836_MINI_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MINI_UART_OFFSET)
+#define BCM2836_MINI_UART_LENGTH 0x00000070
+#define BCM2836_MINI_UART_INTERRUPT 0x7D
+
#endif /*__BCM2836_H__ */
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART Pete Batard
@ 2019-12-19 13:27 ` Philippe Mathieu-Daudé
2019-12-19 13:32 ` Ard Biesheuvel
0 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-19 13:27 UTC (permalink / raw)
To: Pete Batard, devel; +Cc: ard.biesheuvel, leif.lindholm
On 12/19/19 1:14 PM, Pete Batard wrote:
> This adds offset, base address, interrupt and register-space length
> for the 2 UARTs that the Bcm283x SoC provides.
>
> To be consistent, we simplify the two other existing base address
> definitions to a more legible equivalent since there is no point
> in explicit refs to FixedPcdGet64 (PcdBcm283xRegistersAddress).
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> index 02107086d439..dd9a698f7218 100644
> --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> @@ -24,8 +24,7 @@
>
> /* watchdog constants */
> #define BCM2836_WDOG_OFFSET 0x00100000
> -#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> - + BCM2836_WDOG_OFFSET)
> +#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
Good!
> #define BCM2836_WDOG_PASSWORD 0x5a000000
> #define BCM2836_WDOG_RSTC_OFFSET 0x0000001c
> #define BCM2836_WDOG_WDOG_OFFSET 0x00000024
> @@ -34,8 +33,7 @@
>
> /* mailbox interface constants */
> #define BCM2836_MBOX_OFFSET 0x0000b880
> -#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> - + BCM2836_MBOX_OFFSET)
> +#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
> #define BCM2836_MBOX_READ_OFFSET 0x00000000
> #define BCM2836_MBOX_STATUS_OFFSET 0x00000018
> #define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c
> @@ -50,4 +48,15 @@
> #define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x00000040
> #define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060
>
> +/* uart constants */
> +#define BCM2836_PL011_UART_OFFSET 0x00201000
> +#define BCM2836_PL011_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PL011_UART_OFFSET)
> +#define BCM2836_PL011_UART_LENGTH 0x00001000
> +#define BCM2836_PL011_UART_INTERRUPT 0x99
Hmm 96 + 29 = 0x7D, 96 + 57 = 0x99. OK.
Maybe we can later add a definition for this '96'.
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
> +
> +#define BCM2836_MINI_UART_OFFSET 0x00215000
> +#define BCM2836_MINI_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MINI_UART_OFFSET)
> +#define BCM2836_MINI_UART_LENGTH 0x00000070
> +#define BCM2836_MINI_UART_INTERRUPT 0x7D
> +
> #endif /*__BCM2836_H__ */
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART
2019-12-19 13:27 ` Philippe Mathieu-Daudé
@ 2019-12-19 13:32 ` Ard Biesheuvel
2019-12-19 14:11 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 16+ messages in thread
From: Ard Biesheuvel @ 2019-12-19 13:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Pete Batard, edk2-devel-groups-io, Leif Lindholm
On Thu, 19 Dec 2019 at 15:27, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
>
> On 12/19/19 1:14 PM, Pete Batard wrote:
> > This adds offset, base address, interrupt and register-space length
> > for the 2 UARTs that the Bcm283x SoC provides.
> >
> > To be consistent, we simplify the two other existing base address
> > definitions to a more legible equivalent since there is no point
> > in explicit refs to FixedPcdGet64 (PcdBcm283xRegistersAddress).
> >
> > Signed-off-by: Pete Batard <pete@akeo.ie>
> > ---
> > Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 +++++++++++++----
> > 1 file changed, 13 insertions(+), 4 deletions(-)
> >
> > diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> > index 02107086d439..dd9a698f7218 100644
> > --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> > +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> > @@ -24,8 +24,7 @@
> >
> > /* watchdog constants */
> > #define BCM2836_WDOG_OFFSET 0x00100000
> > -#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> > - + BCM2836_WDOG_OFFSET)
> > +#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
>
> Good!
>
> > #define BCM2836_WDOG_PASSWORD 0x5a000000
> > #define BCM2836_WDOG_RSTC_OFFSET 0x0000001c
> > #define BCM2836_WDOG_WDOG_OFFSET 0x00000024
> > @@ -34,8 +33,7 @@
> >
> > /* mailbox interface constants */
> > #define BCM2836_MBOX_OFFSET 0x0000b880
> > -#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> > - + BCM2836_MBOX_OFFSET)
> > +#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
> > #define BCM2836_MBOX_READ_OFFSET 0x00000000
> > #define BCM2836_MBOX_STATUS_OFFSET 0x00000018
> > #define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c
> > @@ -50,4 +48,15 @@
> > #define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x00000040
> > #define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060
> >
> > +/* uart constants */
> > +#define BCM2836_PL011_UART_OFFSET 0x00201000
> > +#define BCM2836_PL011_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PL011_UART_OFFSET)
> > +#define BCM2836_PL011_UART_LENGTH 0x00001000
> > +#define BCM2836_PL011_UART_INTERRUPT 0x99
>
> Hmm 96 + 29 = 0x7D, 96 + 57 = 0x99. OK.
> Maybe we can later add a definition for this '96'.
>
Ehm, no that's not going to happen. It is fine to abstract actual
physical properties like the base of a register block, but that
doesn't make it an end in itself to express arbitrary values like
interrupt line numbers like this.
> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
>
Thanks!
> > +
> > +#define BCM2836_MINI_UART_OFFSET 0x00215000
> > +#define BCM2836_MINI_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MINI_UART_OFFSET)
> > +#define BCM2836_MINI_UART_LENGTH 0x00000070
> > +#define BCM2836_MINI_UART_INTERRUPT 0x7D
> > +
> > #endif /*__BCM2836_H__ */
> >
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART
2019-12-19 13:32 ` Ard Biesheuvel
@ 2019-12-19 14:11 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-19 14:11 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: Pete Batard, edk2-devel-groups-io, Leif Lindholm
On 12/19/19 2:32 PM, Ard Biesheuvel wrote:
> On Thu, 19 Dec 2019 at 15:27, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
>>
>> On 12/19/19 1:14 PM, Pete Batard wrote:
>>> This adds offset, base address, interrupt and register-space length
>>> for the 2 UARTs that the Bcm283x SoC provides.
>>>
>>> To be consistent, we simplify the two other existing base address
>>> definitions to a more legible equivalent since there is no point
>>> in explicit refs to FixedPcdGet64 (PcdBcm283xRegistersAddress).
>>>
>>> Signed-off-by: Pete Batard <pete@akeo.ie>
>>> ---
>>> Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 +++++++++++++----
>>> 1 file changed, 13 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
>>> index 02107086d439..dd9a698f7218 100644
>>> --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
>>> +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
>>> @@ -24,8 +24,7 @@
>>>
>>> /* watchdog constants */
>>> #define BCM2836_WDOG_OFFSET 0x00100000
>>> -#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
>>> - + BCM2836_WDOG_OFFSET)
>>> +#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
>>
>> Good!
>>
>>> #define BCM2836_WDOG_PASSWORD 0x5a000000
>>> #define BCM2836_WDOG_RSTC_OFFSET 0x0000001c
>>> #define BCM2836_WDOG_WDOG_OFFSET 0x00000024
>>> @@ -34,8 +33,7 @@
>>>
>>> /* mailbox interface constants */
>>> #define BCM2836_MBOX_OFFSET 0x0000b880
>>> -#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
>>> - + BCM2836_MBOX_OFFSET)
>>> +#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
>>> #define BCM2836_MBOX_READ_OFFSET 0x00000000
>>> #define BCM2836_MBOX_STATUS_OFFSET 0x00000018
>>> #define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c
>>> @@ -50,4 +48,15 @@
>>> #define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x00000040
>>> #define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060
>>>
>>> +/* uart constants */
>>> +#define BCM2836_PL011_UART_OFFSET 0x00201000
>>> +#define BCM2836_PL011_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PL011_UART_OFFSET)
>>> +#define BCM2836_PL011_UART_LENGTH 0x00001000
>>> +#define BCM2836_PL011_UART_INTERRUPT 0x99
>>
>> Hmm 96 + 29 = 0x7D, 96 + 57 = 0x99. OK.
>> Maybe we can later add a definition for this '96'.
>>
>
> Ehm, no that's not going to happen. It is fine to abstract actual
> physical properties like the base of a register block, but that
> doesn't make it an end in itself to express arbitrary values like
> interrupt line numbers like this.
OK, understood.
>> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
>>
>
> Thanks!
>
>
>>> +
>>> +#define BCM2836_MINI_UART_OFFSET 0x00215000
>>> +#define BCM2836_MINI_UART_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MINI_UART_OFFSET)
>>> +#define BCM2836_MINI_UART_LENGTH 0x00000070
>>> +#define BCM2836_MINI_UART_INTERRUPT 0x7D
>>> +
>>> #endif /*__BCM2836_H__ */
>>>
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [edk2-platforms][PATCH v2 2/7] Platform/RPi4: Clean up ACPI definitions
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 3/7] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
` (5 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
* Use ACPI 5.1 everywhere, since we are constrained to use v5.x for
MADT compatibility.
* Clean up whitespaces and reorganize header declaration.
* Prefix all RPi related constant with RPI_ to make them clearer to
differentiate from regular EDK2 ones.
* Reference IndustryStandard/Acpi.h always.
* Remove explicit references to RPI4 for sources that we may be
factorized for both the Pi 3 and Pi 4 platform.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h | 12 +++---
Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc | 42 ++++++++++----------
Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc | 30 +++++++-------
Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc | 11 ++---
Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl | 4 +-
Platform/RaspberryPi/RPi4/AcpiTables/Pep.c | 6 +--
Platform/RaspberryPi/RPi4/AcpiTables/Pep.h | 8 ++--
7 files changed, 58 insertions(+), 55 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
index e61f3fa0bcfa..dcdbac7a0b7b 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
@@ -13,7 +13,7 @@
#ifndef __ACPITABLES_H__
#define __ACPITABLES_H__
-#include <IndustryStandard/Acpi50.h>
+#include <IndustryStandard/Acpi.h>
#define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'} // OEMID 6 bytes long
#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','4','E','D','K','2') // OEM table id 8 bytes long
@@ -41,10 +41,10 @@
#define EFI_ACPI_CSRT_DEVICE_ID_DMA 0x00000009 // Fixed id
#define EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP 0x0 // Count up from 0
-#define RPI4_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
-#define RPI4_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
+#define RPI_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
+#define RPI_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
-#define EFI_ACPI_5_0_CSRT_REVISION 0x00000000
+#define EFI_ACPI_5_1_CSRT_REVISION 0x00000000
typedef enum
{
@@ -76,7 +76,7 @@ typedef struct
UINT16 Revision; // 2 bytes
UINT16 Reserved; // 2 bytes
UINT32 SharedInfoLength; // 4 bytes
-} EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER;
+} EFI_ACPI_5_1_CSRT_RESOURCE_GROUP_HEADER;
//------------------------------------------------------------------------
// CSRT Resource Descriptor 12 bytes total
@@ -87,6 +87,6 @@ typedef struct
UINT16 ResourceType; // 2 bytes
UINT16 ResourceSubType; // 2 bytes
UINT32 UID; // 4 bytes
-} EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER;
+} EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER;
#endif // __ACPITABLES_H__
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
index 22a370d04017..f8bf3f26a341 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
@@ -9,14 +9,16 @@
*
**/
+#include <IndustryStandard/Acpi.h>
+
#include "AcpiTables.h"
-#define DMA_MAX_REQ_LINES 32
+#define RPI_DMA_MAX_REQ_LINES 32
#pragma pack (push, 1)
//------------------------------------------------------------------------
-// DMA Controller Vendor Data for RPi4
+// DMA Controller Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -34,16 +36,16 @@ typedef struct
} DMA_CONTROLLER_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Controller on RPi4
+// DMA Controller
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaControllerHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaControllerHeader;
DMA_CONTROLLER_VENDOR_DATA ControllerVendorData;
} RD_DMA_CONTROLLER;
//------------------------------------------------------------------------
-// DMA Channel Vendor Data for RPi4
+// DMA Channel Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -54,27 +56,27 @@ typedef struct
} DMA_CHANNEL_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Channel on RPi4
+// DMA Channel
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaChannelHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaChannelHeader;
DMA_CHANNEL_VENDOR_DATA ChannelVendorData;
} RD_DMA_CHANNEL;
//------------------------------------------------------------------------
-// DMA Resource Group on RPi4
+// DMA Resource Group
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
RD_DMA_CONTROLLER DmaController;
- RD_DMA_CHANNEL DmaChannels[RPI4_DMA_CHANNEL_COUNT];
+ RD_DMA_CHANNEL DmaChannels[RPI_DMA_CHANNEL_COUNT];
} RG_DMA;
//----------------------------------------------------------------------------
-// CSRT table structure for RPi4 platform - current revision only includes DMA
+// CSRT table structure - current revision only includes DMA
//----------------------------------------------------------------------------
typedef struct
{
@@ -84,20 +86,20 @@ typedef struct
// DMA Resource Group
RG_DMA DmaResourceGroup;
-} EFI_ACPI_5_0_CSRT_TABLE;
+} EFI_ACPI_5_1_CSRT_TABLE;
-EFI_ACPI_5_0_CSRT_TABLE Csrt =
+EFI_ACPI_5_1_CSRT_TABLE Csrt =
{
//------------------------------------------------------------------------
// ACPI Table Header
//------------------------------------------------------------------------
{
- EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE, // Signature "CSRT"
+ EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE, // Signature "CSRT"
sizeof (EFI_ACPI_DESCRIPTION_HEADER) + sizeof (RG_DMA), // Length
- EFI_ACPI_5_0_CSRT_REVISION, // Revision
+ EFI_ACPI_5_1_CSRT_REVISION, // Revision
0x00, // Checksum calculated at runtime.
- EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
- EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI4EDK2"
+ EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field
+ EFI_ACPI_OEM_TABLE_ID, // OEM table identification (8 bytes long)
EFI_ACPI_OEM_REVISION, // OEM revision number.
EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID.
EFI_ACPI_CREATOR_REVISION // ASL compiler revision number.
@@ -136,13 +138,13 @@ EFI_ACPI_5_0_CSRT_TABLE Csrt =
sizeof (DMA_CONTROLLER_VENDOR_DATA), // Controller vendor data here
1,
0xFE007000, // Base address for channels
- RPI4_DMA_CHANNEL_COUNT * 0x100, // Base size = Number of channels x 0x100 size for each channel
+ RPI_DMA_CHANNEL_COUNT * 0x100, // Base size = Number of channels x 0x100 size for each channel
0xFE007FE0, // Base address for controller
8, // Base size = two registers
- RPI4_DMA_USED_CHANNEL_COUNT,
+ RPI_DMA_USED_CHANNEL_COUNT,
0, // cannot use controller interrupt
0, // Minimum Request Line
- DMA_MAX_REQ_LINES - 1, // Maximum Request Line
+ RPI_DMA_MAX_REQ_LINES - 1, // Maximum Request Line
FALSE,
},
},
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
index 293c6022d258..7c2aa9389456 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
@@ -8,41 +8,41 @@
*
**/
+#include <IndustryStandard/Acpi.h>
#include <Library/AcpiLib.h>
#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
#include "AcpiTables.h"
-#define SYSTEM_TIMER_BASE_ADDRESS 0xFF80001C
-#define GTDT_GLOBAL_FLAGS 0
-#define GTDT_GTIMER_FLAGS EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define RPI_SYSTEM_TIMER_BASE_ADDRESS 0xFF80001C
+#define RPI_GTDT_GLOBAL_FLAGS 0
+#define RPI_GTDT_GTIMER_FLAGS EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
#pragma pack (1)
typedef struct {
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
-} EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES;
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
+} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES;
#pragma pack ()
-EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
{
ACPI_HEADER(
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES,
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES,
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
+ RPI_SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
0, // UINT32 Reserved
FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
0, // UINT32 PlatformTimerCount
0 // UINT32 PlatfromTimerOffset
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
index 0027cb9fe8bb..f847a9310ff7 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
@@ -8,11 +8,12 @@
*
**/
-#include "AcpiTables.h"
+#include <IndustryStandard/Acpi.h>
#include <Library/AcpiLib.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi51.h>
+
+#include "AcpiTables.h"
//
// Multiple APIC Description Table
@@ -45,13 +46,13 @@ PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
0, 0, GET_MPID(0, 0), EFI_ACPI_5_1_GIC_ENABLED, 48, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 1, 1, GET_MPID(0, 1), EFI_ACPI_5_1_GIC_ENABLED, 49, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 1, 1, GET_MPID(0, 1), EFI_ACPI_5_1_GIC_ENABLED, 49, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 51, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 51, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
},
EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
index 7096109f8819..8a0a44e1c4c9 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
@@ -13,9 +13,9 @@
Device(PEPD)
{
//
- // RPI4 PEP virtual device.
+ // PEP virtual device.
//
- Name (_HID, "BCM2854") // Note: since pep on rpi4 is virtual device,
+ Name (_HID, "BCM2854") // Note: Since PEP on RPi is a virtual device,
Name (_CID, "BCM2854") // its device id needs to be generated by Microsoft
Name (_UID, 0x0)
Name (_CRS, ResourceTemplate ()
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
index 1a78392f05a0..f452580c703d 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
@@ -12,7 +12,7 @@
#include "Pep.h"
-PEP_PROCESSOR_TABLE_PLAT RPI4Processors = {
+PEP_PROCESSOR_TABLE_PLAT RpiProcessors = {
1, // Version
1, // NumberProcessors
{ // ProcessorInfo
@@ -30,7 +30,7 @@ PEP_PROCESSOR_TABLE_PLAT RPI4Processors = {
}
};
-PEP_COORDINATED_STATE_TABLE_PLAT RPI4CoordinatedStates = {
+PEP_COORDINATED_STATE_TABLE_PLAT RpiCoordinatedStates = {
1, // Version
1, // CoordinatedStateCount
{ // CordinatedStates[]
@@ -52,7 +52,7 @@ PEP_COORDINATED_STATE_TABLE_PLAT RPI4CoordinatedStates = {
}
};
-PEP_DEVICE_TABLE_PLAT RPI4Devices = {
+PEP_DEVICE_TABLE_PLAT RpiDevices = {
1, // Version
1, // NumberDevices
{ // DeviceInfo
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
index 19b801caf783..30f6768f12a5 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
@@ -14,10 +14,10 @@
* Note: Not everything is here. At least SOC_STATE_TYPE is missing.
*/
-#ifndef _RPI4PEP_H_INCLUDED_
-#define _RPI4PEP_H_INCLUDED_
+#ifndef _RPI_PEP_H_INCLUDED_
+#define _RPI_PEP_H_INCLUDED_
-#include <IndustryStandard/Acpi50.h>
+#include <IndustryStandard/Acpi.h>
#define PEP_MAX_DEPENDENCIES_PER_STATE 16
#define MAX_PROCESSOR_PATH_LENGTH 16
@@ -118,4 +118,4 @@ typedef struct _PEP_DEVICE_TABLE_PLAT {
PEP_DEVICE_INFO_PLAT DeviceInfo[P_NUMBER_DEVICES];
} PEP_DEVICE_TABLE_PLAT, *PPEP_DEVICE_TABLE_PLAT;
-#endif // _RPI4PEP_H_INCLUDED_
+#endif // _RPI_PEP_H_INCLUDED_
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms][PATCH v2 3/7] Platform/RPi4: Improve FADT ACPI table generation
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 2/7] Platform/RPi4: Clean up ACPI definitions Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 4/7] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
` (4 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
Use a proper aslc source to build the table.
Note that we use ACPI 5.1 for this table to match the MADT
constraints.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 99 ++++++++++++++------
1 file changed, 71 insertions(+), 28 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
index 3ef877fde5f4..ebf58fb7fc3c 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
@@ -2,6 +2,7 @@
*
* Fixed ACPI Description Table (FADT)
*
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
* Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
@@ -9,34 +10,76 @@
*
**/
-UINT8 Fadt[268] = {
- 0x46, 0x41, 0x43, 0x50, 0x0C, 0x01, 0x00, 0x00, 0x05, 0x00, /* 0 */
- 0x42, 0x43, 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4B, 0x32, /* 10 */
- 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, /* 20 */
- 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 40 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
- 0x00, 0x04, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x00, /* 90 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, /* 100 */
- 0x00, 0x00, 0x21, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 120 */
- 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 180 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 210 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 220 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 230 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 268 */
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+/*
+ * Note: Use ACPI 5.1 since we need to match MADT ACPI requirements
+ */
+EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+ ),
+ 0, // UINT32 FirmwareCtrl
+ 0, // UINT32 Dsdt
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
+ EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile
+ 0, // UINT16 SciInt
+ 0, // UINT32 SmiCmd
+ 0, // UINT8 AcpiEnable
+ 0, // UINT8 AcpiDisable
+ 0, // UINT8 S4BiosReq
+ 0, // UINT8 PstateCnt
+ 0, // UINT32 Pm1aEvtBlk
+ 0, // UINT32 Pm1bEvtBlk
+ 0, // UINT32 Pm1aCntBlk
+ 0, // UINT32 Pm1bCntBlk
+ 0, // UINT32 Pm2CntBlk
+ 0, // UINT32 PmTmrBlk
+ 0, // UINT32 Gpe0Blk
+ 0, // UINT32 Gpe1Blk
+ 0, // UINT8 Pm1EvtLen
+ 0, // UINT8 Pm1CntLen
+ 0, // UINT8 Pm2CntLen
+ 0, // UINT8 PmTmrLen
+ 0, // UINT8 Gpe0BlkLen
+ 0, // UINT8 Gpe1BlkLen
+ 0, // UINT8 Gpe1Base
+ 0, // UINT8 CstCnt
+ 0, // UINT16 PLvl2Lat
+ 0, // UINT16 PLvl3Lat
+ 0, // UINT16 FlushSize
+ 0, // UINT16 FlushStride
+ 0, // UINT8 DutyOffset
+ 0, // UINT8 DutyWidth
+ 0, // UINT8 DayAlrm
+ 0, // UINT8 MonAlrm
+ 0, // UINT8 Century
+ EFI_ACPI_RESERVED_WORD, // UINT16 IaPcBootArch (Reserved on ARM)
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1
+ EFI_ACPI_5_1_WBINVD | EFI_ACPI_5_1_SLP_BUTTON | // UINT32 Flags
+ EFI_ACPI_5_1_HW_REDUCED_ACPI,
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
+ 0, // UINT8 ResetValue
+ EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
+ 0, // UINT64 XFirmwareCtrl
+ 0, // UINT64 XDsdt
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg
+ NULL_GAS // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
};
//
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms][PATCH v2 4/7] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
` (2 preceding siblings ...)
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 3/7] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 5/7] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
` (3 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
Use code derived from JunoPkg to generate our serial tables and
also use PCDs where possible.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 5 +-
Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 98 +++++++++++++++++---
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 89 ++++++++++++++++++
4 files changed, 177 insertions(+), 63 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
index 50c9f7694d84..dcbf8d36082c 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
@@ -31,7 +31,7 @@ [Sources]
Gtdt.aslc
Dsdt.asl
Csrt.aslc
- Spcr.asl
+ Spcr.aslc
[Packages]
ArmPkg/ArmPkg.dec
@@ -39,6 +39,7 @@ [Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ Silicon/Broadcom/Bcm283x/Bcm283x.dec
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
@@ -47,4 +48,6 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
+ gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
index 849cf5134793..b71a149c0c0e 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
@@ -2,27 +2,97 @@
*
* Debug Port Table (DBG2)
*
- * Copyright (c) Microsoft Corporation. All rights reserved.
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
+ * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
-UINT8 Dbg2[92] = {
- 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
- 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
- 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
- 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
- 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
- 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
- 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
- 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
- 'M', 0x00,
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/Bcm2836.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define RPI_DBG2_NUM_DEBUG_PORTS 1
+#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
+#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
+
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART
+#define RPI_UART_BASE_ADDRESS BCM2836_MINI_UART_BASE_ADDRESS
+#define RPI_UART_LENGTH BCM2836_MINI_UART_LENGTH
+//
+// RPI_UART_STR should match the value used Uart.asl
+//
+#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
+ { \
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \
+ NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
+ RPI_DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \
+ 0, /* UINT16 OemDataLength */ \
+ 0, /* UINT16 OemDataOffset */ \
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \
+ SubType, /* UINT16 Port Subtype */ \
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \
+ }, \
+ ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+ UartAddrLen, /* UINT32 AddressSize */ \
+ UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \
+ }
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ RPI_DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
+ },
+ {
+ /*
+ * Kernel Debug Port
+ */
+ DBG2_DEBUG_PORT_DDI (
+ RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
+ RPI_UART_INTERFACE_TYPE,
+ RPI_UART_BASE_ADDRESS,
+ RPI_UART_LENGTH,
+ RPI_UART_STR
+ ),
+ }
};
+#pragma pack()
+
//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
//
VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
deleted file mode 100644
index 4632a4f193e7..000000000000
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
+++ /dev/null
@@ -1,48 +0,0 @@
-/** @file
- *
- * Serial Port Console Redirection Table (SPCR)
- *
- * Copyright (c) 2019, ARM Ltd. All rights reserved.
- * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
-[004h 0004 4] Table Length : 00000050
-[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 00
-[00Ah 0010 6] Oem ID : "RPiEFI"
-[010h 0016 8] Oem Table ID : "RPi4UEFI"
-[018h 0024 4] Oem Revision : 00000001
-[01Ch 0028 4] Asl Compiler ID : "----"
-[020h 0032 4] Asl Compiler Revision : 00000000
-
-[024h 0036 1] Interface Type : 10 // 0x03 = PL011, 0x10 = BCM2835
-[025h 0037 3] Reserved : 000000
-
-[028h 0040 12] Serial Port Register : [Generic Address Structure]
-[028h 0040 1] Space ID : 00 [SystemMemory]
-[029h 0041 1] Bit Width : 20
-[02Ah 0042 1] Bit Offset : 00
-[02Bh 0043 1] Encoded Access Width : 03 [DWord Access:32]
-[02Ch 0044 8] Address : FE215000
-
-[034h 0052 1] Interrupt Type : 08 // ARMH GIC interrupt
-[035h 0053 1] PCAT-compatible IRQ : 00
-[036h 0054 4] Interrupt : 7D
-[03Ah 0058 1] Baud Rate : 07 // 115200
-[03Bh 0059 1] Parity : 00
-[03Ch 0060 1] Stop Bits : 01
-[03Dh 0061 1] Flow Control : 00
-[03Eh 0062 1] Terminal Type : 02 // VT-UTF8
-[04Ch 0076 1] Reserved : 00
-[040h 0064 2] PCI Device ID : FFFF
-[042h 0066 2] PCI Vendor ID : FFFF
-[044h 0068 1] PCI Bus : 00
-[045h 0069 1] PCI Device : 00
-[046h 0070 1] PCI Function : 00
-[047h 0071 4] PCI Flags : 00000000
-[04Bh 0075 1] PCI Segment : 00
-[04Ch 0076 4] Reserved : 00000000
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
new file mode 100644
index 000000000000..9931aad8f073
--- /dev/null
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
@@ -0,0 +1,89 @@
+/** @file
+* SPCR Table
+*
+* Copyright (c) 2019 Pete Batard <pete@akeo.ie>
+* Copyright (c) 2014-2016, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/Bcm2836.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+#define RPI_UART_FLOW_CONTROL_NONE 0
+#define RPI_UART_BASE_ADDRESS BCM2836_MINI_UART_BASE_ADDRESS
+#define RPI_UART_INTERRUPT BCM2836_MINI_UART_INTERRUPT
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+ ),
+ // UINT8 InterfaceType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
+ // UINT8 Reserved1[3];
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddress;
+ ARM_GAS32 (RPI_UART_BASE_ADDRESS),
+ // UINT8 InterruptType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+ // UINT8 Irq;
+ 0, // Not used on ARM
+ // UINT32 GlobalSystemInterrupt;
+ RPI_UART_INTERRUPT,
+ // UINT8 BaudRate;
+#if (FixedPcdGet64 (PcdUartDefaultBaudRate) == 9600)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_9600,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 19200)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_19200,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 57600)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_57600,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 115200)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+#else
+#error Unsupported SPCR Baud Rate
+#endif
+ // UINT8 Parity;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+ // UINT8 StopBits;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+ // UINT8 FlowControl;
+ RPI_UART_FLOW_CONTROL_NONE,
+ // UINT8 TerminalType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8,
+ // UINT8 Reserved2;
+ EFI_ACPI_RESERVED_BYTE,
+ // UINT16 PciDeviceId;
+ 0xFFFF,
+ // UINT16 PciVendorId;
+ 0xFFFF,
+ // UINT8 PciBusNumber;
+ 0x00,
+ // UINT8 PciDeviceNumber;
+ 0x00,
+ // UINT8 PciFunctionNumber;
+ 0x00,
+ // UINT32 PciFlags;
+ 0x00000000,
+ // UINT8 PciSegment;
+ 0x00,
+ // UINT32 Reserved3;
+ EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms][PATCH v2 5/7] Platform/RPi4: Add switch to select between PL011 and miniUART
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
` (3 preceding siblings ...)
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 4/7] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table Pete Batard
` (2 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
The PL011 can be a better choice for the serial console on the RPi4,
given that its baud clock is not derived from the CPU clock (which
may change under our feet unless we keep it fixed at a low rate), and
given the fact that the SBSA/SBBR specs that describe ARM specific
architectural requirements for ACPI only permit PL011 based UARTs to
begin with.
Therefore we add a new PL011_ENABLE build switch to tell the firmware
to use PL011 for all console serial I/O, including for TF-A, SPCR and
DBG2, as well as toggle the BlueTooth module to use the mini UART.
For the time being, the option is disabled by default because it
requires an overlay to be enabled in config.txt that pinmuxes the
PL011 TX/RX lines to the UART pins on the connector block.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 7 ++++
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 11 ++++-
Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl | 6 ++-
Platform/RaspberryPi/RPi4/RPi4.dsc | 23 +++++++++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 4 ++
Platform/RaspberryPi/RPi4/Readme.md | 43 ++++++++++++++++----
6 files changed, 82 insertions(+), 12 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
index b71a149c0c0e..dcad8e205596 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
@@ -23,6 +23,12 @@
#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
+#ifdef PL011_ENABLE
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART
+#define RPI_UART_BASE_ADDRESS BCM2836_PL011_UART_BASE_ADDRESS
+#define RPI_UART_LENGTH BCM2836_PL011_UART_LENGTH
+#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', '0', 0x00 }
+#else
#define RPI_UART_INTERFACE_TYPE EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART
#define RPI_UART_BASE_ADDRESS BCM2836_MINI_UART_BASE_ADDRESS
#define RPI_UART_LENGTH BCM2836_MINI_UART_LENGTH
@@ -30,6 +36,7 @@
// RPI_UART_STR should match the value used Uart.asl
//
#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
+#endif
typedef struct {
EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
index 9931aad8f073..cb17fbe0ff2f 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
@@ -17,9 +17,16 @@
#include "AcpiTables.h"
#define RPI_UART_FLOW_CONTROL_NONE 0
+
+#ifdef PL011_ENABLE
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
+#define RPI_UART_BASE_ADDRESS BCM2836_PL011_UART_BASE_ADDRESS
+#define RPI_UART_INTERRUPT BCM2836_PL011_UART_INTERRUPT
+#else
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART
#define RPI_UART_BASE_ADDRESS BCM2836_MINI_UART_BASE_ADDRESS
#define RPI_UART_INTERRUPT BCM2836_MINI_UART_INTERRUPT
-
+#endif
STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
ACPI_HEADER (
EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
@@ -27,7 +34,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
),
// UINT8 InterfaceType;
- EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
+ RPI_UART_INTERFACE_TYPE,
// UINT8 Reserved1[3];
{
EFI_ACPI_RESERVED_BYTE,
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
index 15149892f3b0..5b59f2dd3e16 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
@@ -108,7 +108,7 @@ Device(BTH0)
{
Name (RBUF, ResourceTemplate ()
{
- // BT UART: UART0 (PL011)
+ // BT UART: URT0 (PL011) or URTM (miniUART)
UARTSerialBus(
115200, // InitialBaudRate: in BPS
, // BitsPerByte: default to 8 bits
@@ -133,7 +133,11 @@ Device(BTH0)
// no flow control.
16, // ReceiveBufferSize
16, // TransmitBufferSize
+#ifdef PL011_ENABLE
+ "\\_SB.URTM", // ResourceSource:
+#else
"\\_SB.URT0", // ResourceSource:
+#endif
// UART bus controller name
, // ResourceSourceIndex: assumed to be 0
, // ResourceUsage: assumed to be
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index 1624ebda27d7..ccf5bd5b9ef3 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -38,6 +38,7 @@ [Defines]
DEFINE SECURE_BOOT_ENABLE = FALSE
DEFINE INCLUDE_TFTP_COMMAND = FALSE
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
+ DEFINE PL011_ENABLE = FALSE
################################################################################
#
@@ -116,10 +117,16 @@ [LibraryClasses.common]
ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+!if $(PL011_ENABLE) == TRUE
+ PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+!else
PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!endif
# Cryptographic libraries
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
@@ -229,6 +236,12 @@ [BuildOptions]
GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
+!if $(PL011_ENABLE) == TRUE
+ GCC:*_*_*_CC_FLAGS = -DPL011_ENABLE
+ GCC:*_*_*_ASLPP_FLAGS = -DPL011_ENABLE
+ GCC:*_*_*_ASLCC_FLAGS = -DPL011_ENABLE
+!endif
+
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
@@ -391,6 +404,13 @@ [PcdsFixedAtBuild.common]
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen|0x3ffffff
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr|0x600000000
+!if $(PL011_ENABLE) == TRUE
+ ## PL011 UART
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe201000
+ gArmPlatformTokenSpaceGuid.PL011UartInteger|0
+ gArmPlatformTokenSpaceGuid.PL011UartFractional|0
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
+!else
## NS16550 compatible UART
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe215040
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
@@ -398,7 +418,10 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|500000000
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x27
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|8
+!endif
+
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
#
# ARM General Interrupt Controller
diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf
index 7a506bd2813b..50fe554ec9ec 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.fdf
+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
@@ -51,7 +51,11 @@ [FD.RPI_EFI]
# ATF primary boot image
#
0x00000000|0x00020000
+!if $(PL011_ENABLE) == TRUE
+FILE = Platform/RaspberryPi/$(PLATFORM_NAME)/TrustedFirmware/bl31_pl011.bin
+!else
FILE = Platform/RaspberryPi/$(PLATFORM_NAME)/TrustedFirmware/bl31_miniuart.bin
+!endif
#
# DTB.
diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi4/Readme.md
index 2e37646e043d..acfbfee185b0 100644
--- a/Platform/RaspberryPi/RPi4/Readme.md
+++ b/Platform/RaspberryPi/RPi4/Readme.md
@@ -18,13 +18,21 @@ following __major__ limitations:
- USB is likely to work only in pre-OS phase at this stage (nonstandard ECAM,
missing ACPI tables).
-- Serial I/O from the OS may not work at all due to CPU throttling affecting
- the miniUART baudrate.
+- Serial I/O from the OS may not work due to CPU throttling affecting the
+ miniUART baudrate. This can be worked around by using the `PL011_ENABLE`
+ compilation option.
# Building
Build instructions from the top level edk2-platforms Readme.md apply.
+The following additional build options are also available:
+- `-D PL011_ENABLE=1`: Selects PL011 for the serial console instead of the
+ miniUART (default). This doesn't change the GPIO pinout for the UART but
+ can be useful if you find that the miniUART baud rate changes when the
+ OS throttles the CPU. Note that this requires one of `disable-bt.dtbo` or
+ `miniuart-bt.dtbo` overlays to have been applied (see below).
+
# Booting the firmware
1. Format a uSD card as FAT16 or FAT32
@@ -33,14 +41,31 @@ Build instructions from the top level edk2-platforms Readme.md apply.
- `bcm2711-rpi-4-b.dtb`
- `fixup4.dat`
- `start4.elf`
+ - `overlays/miniuart-bt.dbto` or `overlays/disable-bt.dtbo` (Optional)
4. Create a `config.txt` with the following content:
- ```
- arm_64bit=1
- enable_uart=1
- core_freq=250
- enable_gic=1
- armstub=RPI_EFI.fd
- ```
+ - For a firmware **without** the `PL011_ENABLE` build option:
+ ```
+ arm_64bit=1
+ enable_uart=1
+ core_freq=250
+ enable_gic=1
+ armstub=RPI_EFI.fd
+ disable_commandline_tags=1
+ ```
+ - For a firmware **with** the `PL011_ENABLE` build option:
+ ```
+ arm_64bit=1
+ enable_gic=1
+ armstub=RPI_EFI.fd
+ disable_commandline_tags=1
+ device_tree_address=0x20000
+ device_tree_end=0x30000
+ device_tree=bcm2711-rpi-4-b.dtb
+ dtoverlay=miniuart-bt
+ ```
+ The above also requires `miniuart-bt.dbto` to have been copied into an `overlays/`
+ directory on the uSD card. Alternatively, you may use `disable-bt` instead of
+ `miniuart-bt` if you don't require BlueTooth.
5. Insert the uSD card and power up the Pi.
# Notes
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
` (4 preceding siblings ...)
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 5/7] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 13:12 ` Ard Biesheuvel
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 7/7] Platform/RPi4: Add ACPI basic mode build option Pete Batard
2019-12-19 16:55 ` [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Ard Biesheuvel
7 siblings, 1 reply; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
From: Andrei Warkentin <andrey.warkentin@gmail.com>
Since the RPi4 PCIe host bridge is not ECAM compliant, we can
not expose it as a host bridge to the OS via ACPI. However,
given the hardwired nature of this platform, we can expose the
xHCI controller that is guaranteed to live at the base of the
MMIO32 BAR window as a platform device directly.
It should be noted that the xHCI table is not finalized at this
stage, as Windows xHCI support is still a major question mark.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 3 +
Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
3 files changed, 141 insertions(+)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
index dcbf8d36082c..5ce4c0b52b32 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
@@ -39,6 +39,7 @@ [Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
Silicon/Broadcom/Bcm283x/Bcm283x.dec
[FixedPcd]
@@ -48,6 +49,8 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
index 42e650a3ef29..b2f1d3439211 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
@@ -22,6 +22,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
{
include ("Sdhc.asl")
include ("Pep.asl")
+ include ("Xhci.asl")
Device (CPU0)
{
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
new file mode 100644
index 000000000000..e1fd501ab895
--- /dev/null
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
@@ -0,0 +1,137 @@
+/** @file
+ *
+ * Copyright (c) 2019 Linaro, Limited. All rights reserved.
+ * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Bcm2711.h>
+
+/*
+ * The following can be used to remove parenthesis from
+ * defined macros that the compiler complains about.
+ */
+#define ISOLATE_ARGS(...) __VA_ARGS__
+#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
+
+#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO_WINDOW)
+#define SANITIZED_PCIE_REG_BASE REMOVE_PARENTHESES(PCIE_REG_BASE)
+
+/*
+ * According to UEFI boot log for the VLI device on Pi 4.
+ */
+#define XHCI_REG_LENGTH 0x1000
+
+Device (SCB0) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ /*
+ * Container devices with _DMA must have _CRS, meaning SCB0
+ * to provide all resources that XHC0 consumes (except
+ * interrupts).
+ */
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory (ResourceProducer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
+ 0x0,
+ 0x1, // LEN
+ ,
+ ,
+ MMIO
+ )
+ })
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
+ Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ /*
+ * XHC0 is limited to DMA to first 3GB. Note this
+ * only applies to PCIe, not GENET or other devices
+ * next to the A72.
+ */
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x0, // MIN
+ 0xbfffffff, // MAX
+ 0x0, // TRA
+ 0xc0000000, // LEN
+ ,
+ ,
+ )
+ })
+
+ Device (XHC0)
+ {
+ Name (_HID, "11063483") // _HID: Hardware ID
+ Name (_CID, "PNP0D10") // _CID: Hardware ID
+ Name (_UID, 0x0) // _UID: Unique ID
+ Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
+ 0x0,
+ 0x1, // LEN
+ ,
+ ,
+ MMIO
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
+ 175
+ }
+ })
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
+ Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
+ Return (RBUF)
+ }
+
+ Method (_INI, 0, Serialized) {
+ OperationRegion (PCFG, SystemMemory, SANITIZED_PCIE_REG_BASE + PCIE_EXT_CFG_DATA, 0x1000)
+ Field (PCFG, AnyAcc, NoLock, Preserve) {
+ Offset (0),
+ VNID, 16, // Vendor ID
+ DVID, 16, // Device ID
+ CMND, 16, // Command register
+ STAT, 16, // Status register
+ }
+
+ // Set command register to:
+ // 1) decode MMIO (set bit 1)
+ // 2) enable DMA (set bit 2)
+ // 3) enable interrupts (clear bit 10)
+ Debug = "xHCI enable"
+ Store (0x6, CMND)
+ }
+ }
+}
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table Pete Batard
@ 2019-12-19 13:12 ` Ard Biesheuvel
2019-12-19 13:32 ` Pete Batard
0 siblings, 1 reply; 16+ messages in thread
From: Ard Biesheuvel @ 2019-12-19 13:12 UTC (permalink / raw)
To: Pete Batard
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
Hi Pete,
On Thu, 19 Dec 2019 at 14:14, Pete Batard <pete@akeo.ie> wrote:
>
> From: Andrei Warkentin <andrey.warkentin@gmail.com>
>
> Since the RPi4 PCIe host bridge is not ECAM compliant, we can
> not expose it as a host bridge to the OS via ACPI. However,
> given the hardwired nature of this platform, we can expose the
> xHCI controller that is guaranteed to live at the base of the
> MMIO32 BAR window as a platform device directly.
>
> It should be noted that the xHCI table is not finalized at this
> stage, as Windows xHCI support is still a major question mark.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 3 +
> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
> 3 files changed, 141 insertions(+)
>
...
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> new file mode 100644
> index 000000000000..e1fd501ab895
> --- /dev/null
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> @@ -0,0 +1,137 @@
> +/** @file
> + *
> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
> + * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
> + *
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + **/
> +
> +#include <IndustryStandard/Bcm2711.h>
> +
> +/*
> + * The following can be used to remove parenthesis from
> + * defined macros that the compiler complains about.
> + */
> +#define ISOLATE_ARGS(...) __VA_ARGS__
> +#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
> +
> +#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO_WINDOW)
> +#define SANITIZED_PCIE_REG_BASE REMOVE_PARENTHESES(PCIE_REG_BASE)
> +
> +/*
> + * According to UEFI boot log for the VLI device on Pi 4.
> + */
> +#define XHCI_REG_LENGTH 0x1000
> +
> +Device (SCB0) {
> + Name (_HID, "ACPI0004")
> + Name (_UID, 0x0)
> + Name (_CCA, 0x0)
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + /*
> + * Container devices with _DMA must have _CRS, meaning SCB0
> + * to provide all resources that XHC0 consumes (except
> + * interrupts).
> + */
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory (ResourceProducer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
> + 0x0,
> + 0x1, // LEN
> + ,
> + ,
> + MMIO
> + )
> + })
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
> + Return (RBUF)
> + }
> +
> + Name (_DMA, ResourceTemplate() {
> + /*
> + * XHC0 is limited to DMA to first 3GB. Note this
> + * only applies to PCIe, not GENET or other devices
> + * next to the A72.
> + */
> + QWordMemory (ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0x0, // MIN
> + 0xbfffffff, // MAX
> + 0x0, // TRA
> + 0xc0000000, // LEN
> + ,
> + ,
> + )
> + })
> +
> + Device (XHC0)
> + {
> + Name (_HID, "11063483") // _HID: Hardware ID
I failed to spot this detail before. Even if MS appears to do so, I
don't think it is OK to string random digits together to create
hardware identifiers (and yes, I am aware it's the vendor and device
IDs concatenated)
What's wrong with using the below as the _HID?
> + Name (_CID, "PNP0D10") // _CID: Hardware ID
> + Name (_UID, 0x0) // _UID: Unique ID
> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory (ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
> + 0x0,
> + 0x1, // LEN
> + ,
> + ,
> + MMIO
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
> + 175
> + }
> + })
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
> + Return (RBUF)
> + }
> +
> + Method (_INI, 0, Serialized) {
> + OperationRegion (PCFG, SystemMemory, SANITIZED_PCIE_REG_BASE + PCIE_EXT_CFG_DATA, 0x1000)
> + Field (PCFG, AnyAcc, NoLock, Preserve) {
> + Offset (0),
> + VNID, 16, // Vendor ID
> + DVID, 16, // Device ID
> + CMND, 16, // Command register
> + STAT, 16, // Status register
> + }
> +
> + // Set command register to:
> + // 1) decode MMIO (set bit 1)
> + // 2) enable DMA (set bit 2)
> + // 3) enable interrupts (clear bit 10)
> + Debug = "xHCI enable"
> + Store (0x6, CMND)
> + }
> + }
> +}
> --
> 2.21.0.windows.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table
2019-12-19 13:12 ` Ard Biesheuvel
@ 2019-12-19 13:32 ` Pete Batard
2019-12-19 13:33 ` Ard Biesheuvel
0 siblings, 1 reply; 16+ messages in thread
From: Pete Batard @ 2019-12-19 13:32 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
Hi Ard,
On 2019.12.19 13:12, Ard Biesheuvel wrote:
> Hi Pete,
>
> On Thu, 19 Dec 2019 at 14:14, Pete Batard <pete@akeo.ie> wrote:
>>
>> From: Andrei Warkentin <andrey.warkentin@gmail.com>
>>
>> Since the RPi4 PCIe host bridge is not ECAM compliant, we can
>> not expose it as a host bridge to the OS via ACPI. However,
>> given the hardwired nature of this platform, we can expose the
>> xHCI controller that is guaranteed to live at the base of the
>> MMIO32 BAR window as a platform device directly.
>>
>> It should be noted that the xHCI table is not finalized at this
>> stage, as Windows xHCI support is still a major question mark.
>>
>> Signed-off-by: Pete Batard <pete@akeo.ie>
>> ---
>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 3 +
>> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
>> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
>> 3 files changed, 141 insertions(+)
>>
> ...
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>> new file mode 100644
>> index 000000000000..e1fd501ab895
>> --- /dev/null
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>> @@ -0,0 +1,137 @@
>> +/** @file
>> + *
>> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
>> + * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
>> + *
>> + * SPDX-License-Identifier: BSD-2-Clause-Patent
>> + *
>> + **/
>> +
>> +#include <IndustryStandard/Bcm2711.h>
>> +
>> +/*
>> + * The following can be used to remove parenthesis from
>> + * defined macros that the compiler complains about.
>> + */
>> +#define ISOLATE_ARGS(...) __VA_ARGS__
>> +#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
>> +
>> +#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO_WINDOW)
>> +#define SANITIZED_PCIE_REG_BASE REMOVE_PARENTHESES(PCIE_REG_BASE)
>> +
>> +/*
>> + * According to UEFI boot log for the VLI device on Pi 4.
>> + */
>> +#define XHCI_REG_LENGTH 0x1000
>> +
>> +Device (SCB0) {
>> + Name (_HID, "ACPI0004")
>> + Name (_UID, 0x0)
>> + Name (_CCA, 0x0)
>> +
>> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
>> + /*
>> + * Container devices with _DMA must have _CRS, meaning SCB0
>> + * to provide all resources that XHC0 consumes (except
>> + * interrupts).
>> + */
>> + Name (RBUF, ResourceTemplate () {
>> + QWordMemory (ResourceProducer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
>> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
>> + 0x0,
>> + 0x1, // LEN
>> + ,
>> + ,
>> + MMIO
>> + )
>> + })
>> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
>> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
>> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
>> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
>> + Return (RBUF)
>> + }
>> +
>> + Name (_DMA, ResourceTemplate() {
>> + /*
>> + * XHC0 is limited to DMA to first 3GB. Note this
>> + * only applies to PCIe, not GENET or other devices
>> + * next to the A72.
>> + */
>> + QWordMemory (ResourceConsumer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + 0x0, // MIN
>> + 0xbfffffff, // MAX
>> + 0x0, // TRA
>> + 0xc0000000, // LEN
>> + ,
>> + ,
>> + )
>> + })
>> +
>> + Device (XHC0)
>> + {
>> + Name (_HID, "11063483") // _HID: Hardware ID
>
> I failed to spot this detail before. Even if MS appears to do so, I
> don't think it is OK to string random digits together to create
> hardware identifiers (and yes, I am aware it's the vendor and device
> IDs concatenated)
>
> What's wrong with using the below as the _HID?
Well, considering that we haven't managed to get Windows booting with
xHCI yet anyway, and that this doesn't impact Linux boot (I've just
validated this, to be safe), I see nothing wrong with using "PNP0D10"
for now and then figure out later if there's a need to use something else.
If there are other requests leading to a v3, I'll apply that change. But
if not, do you (or the person who's going to do it) mind changing the
string during integration?
Regards,
/Pete
>
>> + Name (_CID, "PNP0D10") // _CID: Hardware ID
>> + Name (_UID, 0x0) // _UID: Unique ID
>> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
>> +
>> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
>> + Name (RBUF, ResourceTemplate () {
>> + QWordMemory (ResourceConsumer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
>> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
>> + 0x0,
>> + 0x1, // LEN
>> + ,
>> + ,
>> + MMIO
>> + )
>> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
>> + 175
>> + }
>> + })
>> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
>> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
>> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
>> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
>> + Return (RBUF)
>> + }
>> +
>> + Method (_INI, 0, Serialized) {
>> + OperationRegion (PCFG, SystemMemory, SANITIZED_PCIE_REG_BASE + PCIE_EXT_CFG_DATA, 0x1000)
>> + Field (PCFG, AnyAcc, NoLock, Preserve) {
>> + Offset (0),
>> + VNID, 16, // Vendor ID
>> + DVID, 16, // Device ID
>> + CMND, 16, // Command register
>> + STAT, 16, // Status register
>> + }
>> +
>> + // Set command register to:
>> + // 1) decode MMIO (set bit 1)
>> + // 2) enable DMA (set bit 2)
>> + // 3) enable interrupts (clear bit 10)
>> + Debug = "xHCI enable"
>> + Store (0x6, CMND)
>> + }
>> + }
>> +}
>> --
>> 2.21.0.windows.1
>>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table
2019-12-19 13:32 ` Pete Batard
@ 2019-12-19 13:33 ` Ard Biesheuvel
0 siblings, 0 replies; 16+ messages in thread
From: Ard Biesheuvel @ 2019-12-19 13:33 UTC (permalink / raw)
To: Pete Batard
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
On Thu, 19 Dec 2019 at 15:32, Pete Batard <pete@akeo.ie> wrote:
>
> Hi Ard,
>
> On 2019.12.19 13:12, Ard Biesheuvel wrote:
> > Hi Pete,
> >
> > On Thu, 19 Dec 2019 at 14:14, Pete Batard <pete@akeo.ie> wrote:
> >>
> >> From: Andrei Warkentin <andrey.warkentin@gmail.com>
> >>
> >> Since the RPi4 PCIe host bridge is not ECAM compliant, we can
> >> not expose it as a host bridge to the OS via ACPI. However,
> >> given the hardwired nature of this platform, we can expose the
> >> xHCI controller that is guaranteed to live at the base of the
> >> MMIO32 BAR window as a platform device directly.
> >>
> >> It should be noted that the xHCI table is not finalized at this
> >> stage, as Windows xHCI support is still a major question mark.
> >>
> >> Signed-off-by: Pete Batard <pete@akeo.ie>
> >> ---
> >> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 3 +
> >> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
> >> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
> >> 3 files changed, 141 insertions(+)
> >>
> > ...
> >> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> >> new file mode 100644
> >> index 000000000000..e1fd501ab895
> >> --- /dev/null
> >> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> >> @@ -0,0 +1,137 @@
> >> +/** @file
> >> + *
> >> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
> >> + * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
> >> + *
> >> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> >> + *
> >> + **/
> >> +
> >> +#include <IndustryStandard/Bcm2711.h>
> >> +
> >> +/*
> >> + * The following can be used to remove parenthesis from
> >> + * defined macros that the compiler complains about.
> >> + */
> >> +#define ISOLATE_ARGS(...) __VA_ARGS__
> >> +#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
> >> +
> >> +#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO_WINDOW)
> >> +#define SANITIZED_PCIE_REG_BASE REMOVE_PARENTHESES(PCIE_REG_BASE)
> >> +
> >> +/*
> >> + * According to UEFI boot log for the VLI device on Pi 4.
> >> + */
> >> +#define XHCI_REG_LENGTH 0x1000
> >> +
> >> +Device (SCB0) {
> >> + Name (_HID, "ACPI0004")
> >> + Name (_UID, 0x0)
> >> + Name (_CCA, 0x0)
> >> +
> >> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> >> + /*
> >> + * Container devices with _DMA must have _CRS, meaning SCB0
> >> + * to provide all resources that XHC0 consumes (except
> >> + * interrupts).
> >> + */
> >> + Name (RBUF, ResourceTemplate () {
> >> + QWordMemory (ResourceProducer,
> >> + ,
> >> + MinFixed,
> >> + MaxFixed,
> >> + NonCacheable,
> >> + ReadWrite,
> >> + 0x0,
> >> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
> >> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
> >> + 0x0,
> >> + 0x1, // LEN
> >> + ,
> >> + ,
> >> + MMIO
> >> + )
> >> + })
> >> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> >> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> >> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
> >> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
> >> + Return (RBUF)
> >> + }
> >> +
> >> + Name (_DMA, ResourceTemplate() {
> >> + /*
> >> + * XHC0 is limited to DMA to first 3GB. Note this
> >> + * only applies to PCIe, not GENET or other devices
> >> + * next to the A72.
> >> + */
> >> + QWordMemory (ResourceConsumer,
> >> + ,
> >> + MinFixed,
> >> + MaxFixed,
> >> + NonCacheable,
> >> + ReadWrite,
> >> + 0x0,
> >> + 0x0, // MIN
> >> + 0xbfffffff, // MAX
> >> + 0x0, // TRA
> >> + 0xc0000000, // LEN
> >> + ,
> >> + ,
> >> + )
> >> + })
> >> +
> >> + Device (XHC0)
> >> + {
> >> + Name (_HID, "11063483") // _HID: Hardware ID
> >
> > I failed to spot this detail before. Even if MS appears to do so, I
> > don't think it is OK to string random digits together to create
> > hardware identifiers (and yes, I am aware it's the vendor and device
> > IDs concatenated)
> >
> > What's wrong with using the below as the _HID?
>
> Well, considering that we haven't managed to get Windows booting with
> xHCI yet anyway, and that this doesn't impact Linux boot (I've just
> validated this, to be safe), I see nothing wrong with using "PNP0D10"
> for now and then figure out later if there's a need to use something else.
>
> If there are other requests leading to a v3, I'll apply that change. But
> if not, do you (or the person who's going to do it) mind changing the
> string during integration?
>
No, that's fine, I'll fix it up when applying.
> >
> >> + Name (_CID, "PNP0D10") // _CID: Hardware ID
> >> + Name (_UID, 0x0) // _UID: Unique ID
> >> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
> >> +
> >> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> >> + Name (RBUF, ResourceTemplate () {
> >> + QWordMemory (ResourceConsumer,
> >> + ,
> >> + MinFixed,
> >> + MaxFixed,
> >> + NonCacheable,
> >> + ReadWrite,
> >> + 0x0,
> >> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
> >> + SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
> >> + 0x0,
> >> + 0x1, // LEN
> >> + ,
> >> + ,
> >> + MMIO
> >> + )
> >> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
> >> + 175
> >> + }
> >> + })
> >> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> >> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> >> + Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
> >> + Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
> >> + Return (RBUF)
> >> + }
> >> +
> >> + Method (_INI, 0, Serialized) {
> >> + OperationRegion (PCFG, SystemMemory, SANITIZED_PCIE_REG_BASE + PCIE_EXT_CFG_DATA, 0x1000)
> >> + Field (PCFG, AnyAcc, NoLock, Preserve) {
> >> + Offset (0),
> >> + VNID, 16, // Vendor ID
> >> + DVID, 16, // Device ID
> >> + CMND, 16, // Command register
> >> + STAT, 16, // Status register
> >> + }
> >> +
> >> + // Set command register to:
> >> + // 1) decode MMIO (set bit 1)
> >> + // 2) enable DMA (set bit 2)
> >> + // 3) enable interrupts (clear bit 10)
> >> + Debug = "xHCI enable"
> >> + Store (0x6, CMND)
> >> + }
> >> + }
> >> +}
> >> --
> >> 2.21.0.windows.1
> >>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [edk2-platforms][PATCH v2 7/7] Platform/RPi4: Add ACPI basic mode build option
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
` (5 preceding siblings ...)
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 6/7] Platform/RPi4: Add XHCI ACPI table Pete Batard
@ 2019-12-19 12:14 ` Pete Batard
2019-12-19 16:55 ` [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Ard Biesheuvel
7 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 12:14 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Add an ACPI_BASIC_MODE_ENABLE flag to produces builds intended to run in
ACPI mode without any additional requirements (memory limits, acpi=force,
etc).
This flag is disabled by default.
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +++
Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++++++++
Platform/RaspberryPi/RPi4/RPi4.dsc | 6 ++++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 3 +++
Platform/RaspberryPi/RPi4/Readme.md | 9 +++++++--
Platform/RaspberryPi/RaspberryPi.dec | 3 +++
6 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
index 77cdbe399a06..9abcc2cc0075 100644
--- a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
@@ -59,5 +59,8 @@ [FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+[FeaturePcd]
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode
+
[Ppis]
gArmMpCoreInfoPpiGuid
diff --git a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
index f8223d1b94e8..4b388465cdde 100644
--- a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
+++ b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
@@ -155,6 +155,14 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION;
VirtualMemoryInfo[Index++].Name = L"SoC Reserved (283x)";
+ if (FeaturePcdGet (PcdAcpiBasicMode)) {
+ //
+ // Limit the memory to 3 GB to work around the DMA bugs in the SoC without
+ // having to rely on IORT or _DMA descriptions.
+ //
+ SystemMemorySize = MIN(SystemMemorySize, 3U * SIZE_1GB);
+ }
+
// If we have RAM above the 1 GB mark, declare it
if (SystemMemorySize - SIZE_1GB > 0) {
VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdExtendedMemoryBase);
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index ccf5bd5b9ef3..02de104df5bf 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -39,6 +39,7 @@ [Defines]
DEFINE INCLUDE_TFTP_COMMAND = FALSE
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
DEFINE PL011_ENABLE = FALSE
+ DEFINE ACPI_BASIC_MODE_ENABLE = FALSE
################################################################################
#
@@ -263,6 +264,8 @@ [PcdsFeatureFlag.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|$(ACPI_BASIC_MODE_ENABLE)
+
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
@@ -558,12 +561,15 @@ [Components.common]
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
+ EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
+!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
+!endif
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf
index 50fe554ec9ec..2bcfdb3244f6 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.fdf
+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
@@ -208,10 +208,13 @@ [FV.FvMain]
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
INF Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
+ INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
+!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
+!endif
INF Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi4/Readme.md
index acfbfee185b0..74afc0f89451 100644
--- a/Platform/RaspberryPi/RPi4/Readme.md
+++ b/Platform/RaspberryPi/RPi4/Readme.md
@@ -16,8 +16,9 @@ Raspberry Pi is a trademark of the [Raspberry Pi Foundation](https://www.raspber
This firmware is still in development stage, meaning that it comes with the
following __major__ limitations:
-- USB is likely to work only in pre-OS phase at this stage (nonstandard ECAM,
- missing ACPI tables).
+- USB may only work in pre-OS phase at this stage due to nonstandard ECAM,
+ missing/incomplete ACPI tables as well as other factors. For Linux, using
+ the `ACPI_BASIC_MODE_ENABLE` build option may help.
- Serial I/O from the OS may not work due to CPU throttling affecting the
miniUART baudrate. This can be worked around by using the `PL011_ENABLE`
compilation option.
@@ -27,6 +28,10 @@ following __major__ limitations:
Build instructions from the top level edk2-platforms Readme.md apply.
The following additional build options are also available:
+- `-D ACPI_BASIC_MODE_ENABLE=1`: Limits OS visible memory to 3 GB and forces
+ ACPI (by disabling the Device Tree driver altogether). This may be required
+ to boot Operating Systems such as Linux on account of the current PCIe/xHCI
+ limitations.
- `-D PL011_ENABLE=1`: Selects PL011 for the serial console instead of the
miniUART (default). This doesn't change the GPIO pinout for the UART but
can be useful if you find that the miniUART baud rate changes when the
diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec
index c7e17350544a..bc378ffbfb8d 100644
--- a/Platform/RaspberryPi/RaspberryPi.dec
+++ b/Platform/RaspberryPi/RaspberryPi.dec
@@ -57,3 +57,6 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
gRaspberryPiTokenSpaceGuid.PcdCustomCpuClock|0|UINT32|0x00000016
gRaspberryPiTokenSpaceGuid.PcdDisplayEnableScaledVModes|0|UINT8|0x00000017
gRaspberryPiTokenSpaceGuid.PcdDisplayEnableSShot|0|UINT32|0x00000018
+
+[PcdsFeatureFlag.common]
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|FALSE|BOOLEAN|0x00000019
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements
2019-12-19 12:14 [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Pete Batard
` (6 preceding siblings ...)
2019-12-19 12:14 ` [edk2-platforms][PATCH v2 7/7] Platform/RPi4: Add ACPI basic mode build option Pete Batard
@ 2019-12-19 16:55 ` Ard Biesheuvel
2019-12-19 17:20 ` Pete Batard
7 siblings, 1 reply; 16+ messages in thread
From: Ard Biesheuvel @ 2019-12-19 16:55 UTC (permalink / raw)
To: Pete Batard
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
On Thu, 19 Dec 2019 at 14:14, Pete Batard <pete@akeo.ie> wrote:
>
> Changes from v1 (https://edk2.groups.io/g/devel/message/52342 - 52348):
> * Add PL011 and miniUART constants in Silicon/.../Bcm2836.h and use
> those in the SPCR and DBG2 tables
> * Use default values in FADT wherever possible
> * Drop MCFG table
> * Improve computation of MMIO window in XHCI table
> * Improve/clarify macro definitions in XHCI table
> * Fix a typo in one of the new sections from the Readme
>
> Andrei Warkentin (1):
> Platform/RPi4: Add XHCI ACPI table
>
> Ard Biesheuvel (1):
> Platform/RPi4: Add ACPI basic mode build option
>
> Pete Batard (5):
> Silicon/Bcm283x: Add UART constants for PL011 and miniUART
> Platform/RPi4: Clean up ACPI definitions
> Platform/RPi4: Improve FADT ACPI table generation
> Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
> Platform/RPi4: Add switch to select between PL011 and miniUART
>
For the series
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Pushed as 8187c6f35035..e9395c53ba2c
Thanks all
> Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +
> Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h | 12 +-
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 8 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc | 42 +++---
> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 105 +++++++++++++--
> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
> Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 99 ++++++++++----
> Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc | 30 ++---
> Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc | 11 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl | 4 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Pep.c | 6 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Pep.h | 8 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 -------
> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 96 ++++++++++++++
> Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl | 6 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
> Platform/RaspberryPi/RPi4/RPi4.dsc | 29 +++++
> Platform/RaspberryPi/RPi4/RPi4.fdf | 7 +
> Platform/RaspberryPi/RPi4/Readme.md | 52 ++++++--
> Platform/RaspberryPi/RaspberryPi.dec | 3 +
> Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 ++-
> 22 files changed, 570 insertions(+), 162 deletions(-)
> delete mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
> create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
> create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>
> --
> 2.21.0.windows.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements
2019-12-19 16:55 ` [edk2-platforms][PATCH v2 0/7] Platform/RPi4: ACPI improvements Ard Biesheuvel
@ 2019-12-19 17:20 ` Pete Batard
0 siblings, 0 replies; 16+ messages in thread
From: Pete Batard @ 2019-12-19 17:20 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
On 2019.12.19 16:55, Ard Biesheuvel wrote:
> On Thu, 19 Dec 2019 at 14:14, Pete Batard <pete@akeo.ie> wrote:
>>
>> Changes from v1 (https://edk2.groups.io/g/devel/message/52342 - 52348):
>> * Add PL011 and miniUART constants in Silicon/.../Bcm2836.h and use
>> those in the SPCR and DBG2 tables
>> * Use default values in FADT wherever possible
>> * Drop MCFG table
>> * Improve computation of MMIO window in XHCI table
>> * Improve/clarify macro definitions in XHCI table
>> * Fix a typo in one of the new sections from the Readme
>>
>> Andrei Warkentin (1):
>> Platform/RPi4: Add XHCI ACPI table
>>
>> Ard Biesheuvel (1):
>> Platform/RPi4: Add ACPI basic mode build option
>>
>> Pete Batard (5):
>> Silicon/Bcm283x: Add UART constants for PL011 and miniUART
>> Platform/RPi4: Clean up ACPI definitions
>> Platform/RPi4: Improve FADT ACPI table generation
>> Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
>> Platform/RPi4: Add switch to select between PL011 and miniUART
>>
>
> For the series
> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Pushed as 8187c6f35035..e9395c53ba2c
Awesome!
Can I ask for someone to please push
https://edk2.groups.io/g/devel/topic/68154411#52131 as well, since it's
been reviewed? This may become quite relevant for people playing with
DEBUG versions of the Pi 4 firmware...
Thanks,
/Pete
>
> Thanks all
>
>
>> Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +
>> Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++
>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h | 12 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 8 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc | 42 +++---
>> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 105 +++++++++++++--
>> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
>> Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 99 ++++++++++----
>> Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc | 30 ++---
>> Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc | 11 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl | 4 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Pep.c | 6 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Pep.h | 8 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 -------
>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 96 ++++++++++++++
>> Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl | 6 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 137 ++++++++++++++++++++
>> Platform/RaspberryPi/RPi4/RPi4.dsc | 29 +++++
>> Platform/RaspberryPi/RPi4/RPi4.fdf | 7 +
>> Platform/RaspberryPi/RPi4/Readme.md | 52 ++++++--
>> Platform/RaspberryPi/RaspberryPi.dec | 3 +
>> Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 ++-
>> 22 files changed, 570 insertions(+), 162 deletions(-)
>> delete mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
>> create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
>> create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>>
>> --
>> 2.21.0.windows.1
>>
^ permalink raw reply [flat|nested] 16+ messages in thread