From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web09.11761.1576862018147454122 for ; Fri, 20 Dec 2019 09:13:39 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: mateusz.albecki@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Dec 2019 09:13:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,336,1571727600"; d="scan'208";a="218533358" Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga006.jf.intel.com with ESMTP; 20 Dec 2019 09:13:34 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [PATCH 0/2] MdeModulePkg/SdMmcPciHcDxe: Send the EdkiiSdMmcSwitchClockFreq notification before sending CMD13 Date: Fri, 20 Dec 2019 18:13:10 +0100 Message-Id: <20191220171312.3120-1-mateusz.albecki@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 The first patch refactors the SdMmcClockSupply function with a goal of sending the EdkiiSdMmcSwitchClockFreq notification before we send the CMD13 to check the switch status in eMMC init flow. This is required to avoid sending the CMD13 on link that still has not been fixed by platform. To avoid changing the driver behavior we avoid sending notifications when the clock is setup for the first time or when we setup the clock after the voltage switch procedure(adressed in second patch). The second patch in the series optimizes the SD card detection routine to stop it from going through the process of internal clock setup after switching the voltage. According to SD HC specification there is no need to setup internal clock all over again. Tests performed: - Booted eMMC in HS400 mode on platform which required post clock freq fixes I wasn't able to test SD card yet due to the lack of setup with working SD. The patch series is available on github here: https://github.com/malbecki/edk2/tree/sdmmc_post_freq_notify Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Mateusz Albecki (2): SdMmcPciHcDxe: Send EdkiiSdMmcSwitchClockFreq after SD clock start MdeModulePkg/SdMmcPciHcDxe: Add function to start SD clock MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 20 +-- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 25 +--- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 24 ++++ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 136 +++++++++++---------- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 45 ++----- 5 files changed, 112 insertions(+), 138 deletions(-) -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.