From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com []) by mx.groups.io with SMTP id smtpd.web12.10742.1577260698093845890 for ; Tue, 24 Dec 2019 23:58:27 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Dec 2019 23:58:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,353,1571727600"; d="scan'208";a="214704566" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga008.fm.intel.com with ESMTP; 24 Dec 2019 23:58:25 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Eric Dong , Ray Ni , Laszlo Ersek , Star Zeng , Siyuan Fu , Michael D Kinney Subject: [PATCH v2 6/6] UefiCpuPkg/MpInitLib: Remove redundant microcode fields in CPU_MP_DATA Date: Wed, 25 Dec 2019 15:58:14 +0800 Message-Id: <20191225075814.8372-7-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20191225075814.8372-1-hao.a.wu@intel.com> References: <20191225075814.8372-1-hao.a.wu@intel.com> Previous commits have introduced below fields in structure CPU_AP_DATA: UINT32 ProcessorSignature; UINT8 PlatformId; UINT64 MicrocodeEntryAddr; which store the information of: A. CPUID B. Platform ID C. Detected microcode patch entry address (including the microcode patch header) for each processor within system. Therefore, the below fields in structure CPU_MP_DATA: UINT32 ProcessorSignature; UINT32 ProcessorFlags; UINT64 MicrocodeDataAddress; UINT32 MicrocodeRevision; which store the BSP's information of: A. CPUID B. Platform ID C. The address and revision of detected microcode patch are redundant and can be removed. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Star Zeng Cc: Siyuan Fu Cc: Michael D Kinney Signed-off-by: Hao A Wu --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 5 -- UefiCpuPkg/Library/MpInitLib/Microcode.c | 51 ++++++-------------- 2 files changed, 14 insertions(+), 42 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index 5f50e79744..6609c958ce 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -263,11 +263,6 @@ struct _CPU_MP_DATA { BOOLEAN PeriodicMode; BOOLEAN TimerInterruptState; - UINT32 ProcessorSignature; - UINT32 ProcessorFlags; - UINT64 MicrocodeDataAddress; - UINT32 MicrocodeRevision; - // // Whether need to use Init-Sipi-Sipi to wake up the APs. // Two cases need to set this value to TRUE. One is in HLT diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/MpInitLib/Microcode.c index 554d3ccddb..110cbadbad 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -85,6 +85,7 @@ MicrocodeDetect ( UINTN Index; UINT8 PlatformId; CPUID_VERSION_INFO_EAX Eax; + CPU_AP_DATA *CpuData; UINT32 CurrentRevision; UINT32 LatestRevision; UINTN TotalSize; @@ -92,16 +93,9 @@ MicrocodeDetect ( UINT32 InCompleteCheckSum32; BOOLEAN CorrectMicrocode; VOID *MicrocodeData; - MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; - UINT32 ProcessorFlags; UINT32 ThreadId; BOOLEAN IsBspCallIn; - // - // set ProcessorFlags to suppress incorrect compiler/analyzer warnings - // - ProcessorFlags = 0; - if (CpuMpData->MicrocodePatchRegionSize == 0) { // // There is no microcode patches @@ -127,28 +121,25 @@ MicrocodeDetect ( } ExtendedTableLength = 0; - // - // Here data of CPUID leafs have not been collected into context buffer, so - // GetProcessorCpuid() cannot be used here to retrieve CPUID data. - // - AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL); - - // - // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID - // - PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID); - PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId; + Eax.Uint32 = CpuMpData->CpuData[ProcessorNumber].ProcessorSignature; + PlatformId = CpuMpData->CpuData[ProcessorNumber].PlatformId; // // Check whether AP has same processor with BSP. // If yes, direct use microcode info saved by BSP. // if (!IsBspCallIn) { - if ((CpuMpData->ProcessorSignature == Eax.Uint32) && - (CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) { - MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress; - LatestRevision = CpuMpData->MicrocodeRevision; - goto Done; + // + // Get the CPU data for BSP + // + CpuData = &(CpuMpData->CpuData[CpuMpData->BspNumber]); + if ((CpuData->ProcessorSignature == Eax.Uint32) && + (CpuData->PlatformId == PlatformId) && + (CpuData->MicrocodeEntryAddr != 0)) { + MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *)(UINTN) CpuData->MicrocodeEntryAddr; + MicrocodeData = (VOID *) (MicrocodeEntryPoint + 1); + LatestRevision = MicrocodeEntryPoint->UpdateRevision; + goto Done; } } @@ -216,7 +207,6 @@ MicrocodeDetect ( CheckSum32 += MicrocodeEntryPoint->Checksum; if (CheckSum32 == 0) { CorrectMicrocode = TRUE; - ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags; } } else if ((MicrocodeEntryPoint->DataSize != 0) && (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) { @@ -260,7 +250,6 @@ MicrocodeDetect ( // Find one // CorrectMicrocode = TRUE; - ProcessorFlags = ExtendedTable->ProcessorFlag; break; } } @@ -332,18 +321,6 @@ Done: CpuMpData->CpuData[ProcessorNumber].MicrocodeEntryAddr = (UINTN) MicrocodeData - sizeof (CPU_MICROCODE_HEADER); } - - if (IsBspCallIn && (LatestRevision != 0)) { - // - // Save BSP processor info and microcode info for later AP use. - // - CpuMpData->ProcessorSignature = Eax.Uint32; - CpuMpData->ProcessorFlags = ProcessorFlags; - CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData; - CpuMpData->MicrocodeRevision = LatestRevision; - DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \ - MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision)); - } } /** -- 2.12.0.windows.1