From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com []) by mx.groups.io with SMTP id smtpd.web12.29151.1577431953513368188 for ; Thu, 26 Dec 2019 23:32:38 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2019 23:32:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,362,1571727600"; d="scan'208";a="220445503" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by orsmga003.jf.intel.com with ESMTP; 26 Dec 2019 23:32:36 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Eric Dong , Ray Ni , Laszlo Ersek , Star Zeng , Siyuan Fu , Michael D Kinney Subject: [PATCH v4 3/6] UefiCpuPkg: Add definitions for EDKII microcode patch HOB Date: Fri, 27 Dec 2019 15:32:26 +0800 Message-Id: <20191227073229.9416-4-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20191227073229.9416-1-hao.a.wu@intel.com> References: <20191227073229.9416-1-hao.a.wu@intel.com> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2430 This commit will add the definitions for EDKII microcode patch HOB. The intention of adding this HOB is to provide a scheme to store the below information: A. The base address and size of the microcode patches that are being loaded (from flash) into memory; B. The information of detected microcode patch for each processor within the system. The producer of the HOB will be the UefiCpuPkg/MpInitLib (where the load, detect and apply of the microcode happen). The consumer of the HOB can be modules that want to detect/apply the microcode patch by themselves again later during the boot flow. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Star Zeng Cc: Siyuan Fu Cc: Michael D Kinney Signed-off-by: Hao A Wu Reviewed-by: Ray Ni --- UefiCpuPkg/UefiCpuPkg.dec | 3 ++ UefiCpuPkg/Include/Guid/MicrocodePatchHob.h | 44 ++++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 797f948631..45b267ac61 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -63,6 +63,9 @@ [Guids] ## Include/Guid/CpuFeaturesInitDone.h gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }} + ## Include/Guid/MicrocodePatchHob.h + gEdkiiMicrocodePatchHobGuid = { 0xd178f11d, 0x8716, 0x418e, { 0xa1, 0x31, 0x96, 0x7d, 0x2a, 0xc4, 0x28, 0x43 }} + [Protocols] ## Include/Protocol/SmmCpuService.h gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }} diff --git a/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h b/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h new file mode 100644 index 0000000000..2d307fbffb --- /dev/null +++ b/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h @@ -0,0 +1,44 @@ +/** @file + The microcode patch HOB is used to store the information of: + A. Base address and size of the loaded microcode patches data; + B. Detected microcode patch for each processor within system. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _MICROCODE_PATCH_HOB_H_ +#define _MICROCODE_PATCH_HOB_H_ + +extern EFI_GUID gEdkiiMicrocodePatchHobGuid; + +// +// The EDKII microcode patch HOB will be produced by MpInitLib and it can be +// consumed by modules that want to detect/apply microcode patches. +// +typedef struct { + // + // The base address of the microcode patches data after being loaded into + // memory. + // + UINT64 MicrocodePatchAddress; + // + // The total size of the loaded microcode patches. + // + UINT64 MicrocodePatchRegionSize; + // + // The number of processors within the system. + // + UINT32 ProcessorCount; + // + // An array with 'ProcessorCount' elements that stores the offset (with + // regard to 'MicrocodePatchAddress') of the detected microcode patch + // (including the CPU_MICROCODE_HEADER data structure) for each processor. + // If no microcode patch is detected for certain processor, the relating + // element will be set to MAX_UINT64. + // + UINT64 ProcessorSpecificPatchOffset[0]; +} EDKII_MICROCODE_PATCH_HOB; + +#endif -- 2.12.0.windows.1