From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f66.google.com (mail-wm1-f66.google.com [209.85.128.66]) by mx.groups.io with SMTP id smtpd.web10.3753.1578390488749953863 for ; Tue, 07 Jan 2020 01:48:09 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=cO0MlCrh; spf=pass (domain: linaro.org, ip: 209.85.128.66, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wm1-f66.google.com with SMTP id u2so18602504wmc.3 for ; Tue, 07 Jan 2020 01:48:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=idlG58B0ysaVk7gbfiB25RgEWl1BbEj8IUNVjbyKL78=; b=cO0MlCrh7v+dHF5opCTiE2A8jPQdoWxpS/eQxnJ0wi8yKQ6aDmuXmxQ/wytD7u6LuV ATMl8StA2ozU0l9X8GiIIzJceuGID1KtiilCm6+8lY/q7W+Qn3n2N6aIGFJcc4Au9FOv /9y+4HC4UN3GwLO9qsLEkuBSVqEg49XIRxr1eGZIFdXYJ8K5fnhr76+L9WPfSYj+FeFl 11aJrXm0rmtBG1BvlT3uHQ2yH9odv/Mj/u3spw/XecXIR7ha2D/hSlutxZhOUL4m3snC 3YWF4Y5+gqgs9n2oBd4cCK96qh6BY5TZTODOS1SkECuB4HZv0Zwgt/2Kd5QgVnvW2Vo/ ZBaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=idlG58B0ysaVk7gbfiB25RgEWl1BbEj8IUNVjbyKL78=; b=lhfKcz7LXfptBiNh66t5mzQI3t+Mu0haP80JMk4PCcmkgZUyx2icY6j6wt9anh/x9Y 3QtlflJTICIw38eO5I86Ob+98ggAYylmYw4qlm6p+Tsw7hXS2YgzdHBMTROw6+IWLcrV 8v2vl0o7h+4qudIX9Ye7Sl/AlG1iAFKnUx3dFvFCzIuGUCG3Kk2Gqj7r3gnIqMV7kZHh ztMFpHvG6IZjhwgurxZJaCFzUIQfsge32+VoFqhdmtjXC/f0zS6YBOJiJymj25FgZcZ7 Ufymka1wVEdnFX/uvkPZ3kv1N8jRxZlgQaSnTW1eO8iJwbgoiH93Z5Rb2UgflXheb0/t 5f5A== X-Gm-Message-State: APjAAAW4GDzMqRD5d4PsL0c/YjUMDaGfnjyrmkUo4a9CnZsOEFHZfBlf O1CFxGGSCnQ7GbudljoT6dn/3HzRyguapw== X-Google-Smtp-Source: APXvYqwYVM4qg5i5RQt5ui3qhsFiF6wv3bCD7Yir36iPDTLkptLGpMhsgnVvii1pexlawiSsZNr/xw== X-Received: by 2002:a1c:4b0a:: with SMTP id y10mr40806171wma.78.1578390486766; Tue, 07 Jan 2020 01:48:06 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2a01:cb1d:112:6f00:cc7e:d2b6:8b0c:cb36]) by smtp.gmail.com with ESMTPSA id u1sm25870210wmc.5.2020.01.07.01.48.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 01:48:05 -0800 (PST) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: lersek@redhat.com, Ard Biesheuvel Subject: [PATCH 2/4] ArmVirtPkg/PlatformPeiLib: discover the TPM base address from the DT Date: Tue, 7 Jan 2020 10:47:58 +0100 Message-Id: <20200107094800.4488-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200107094800.4488-1-ard.biesheuvel@linaro.org> References: <20200107094800.4488-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce a boolean PCD that tells us whether TPM support is enabled in the build, and if it is, record the TPM base address in the existing routine that traverses the device tree in the platform PEIM. Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/ArmVirtPkg.dec | 5 ++ ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf | 12 ++- ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c | 82 +++++++++++++++++--- 3 files changed, 87 insertions(+), 12 deletions(-) diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec index a019cc269d10..ed5114887489 100644 --- a/ArmVirtPkg/ArmVirtPkg.dec +++ b/ArmVirtPkg/ArmVirtPkg.dec @@ -58,6 +58,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule] # gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}|VOID*|0x00000007 + # + # Boolean PCD that defines whether TPM2 support is enabled + # + gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x00000004 + [PcdsDynamic] # # Whether to force disable ACPI, regardless of the fw_cfg settings diff --git a/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf b/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf index 46db117ac28e..c41ee22c9767 100644 --- a/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf +++ b/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf @@ -21,22 +21,30 @@ [Sources] [Packages] ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + SecurityPkg/SecurityPkg.dec [LibraryClasses] DebugLib HobLib FdtLib + PeiServicesLib [FixedPcd] gArmTokenSpaceGuid.PcdFvSize gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding + gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled [Pcd] gArmTokenSpaceGuid.PcdFvBaseAddress gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress + gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## SOMETIMES_PRODUCES + +[Ppis] + gOvmfTpmDiscoveredPpiGuid ## SOMETIMES_PRODUCES [Guids] gEarlyPL011BaseAddressGuid diff --git a/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c b/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c index 0a1469550db0..249e45c04624 100644 --- a/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c +++ b/ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c @@ -1,7 +1,7 @@ /** @file * * Copyright (c) 2011-2014, ARM Limited. All rights reserved. -* Copyright (c) 2014, Linaro Limited. All rights reserved. +* Copyright (c) 2014-2020, Linaro Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -13,11 +13,18 @@ #include #include #include +#include #include #include #include +STATIC CONST EFI_PEI_PPI_DESCRIPTOR mTpm2DiscoveredPpi = { + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, + &gOvmfTpmDiscoveredPpiGuid, + NULL +}; + EFI_STATUS EFIAPI PlatformPeim ( @@ -31,13 +38,18 @@ PlatformPeim ( UINT64 *FdtHobData; UINT64 *UartHobData; INT32 Node, Prev; + INT32 Parent, Depth; CONST CHAR8 *Compatible; CONST CHAR8 *CompItem; CONST CHAR8 *NodeStatus; INT32 Len; + INT32 RangesLen; INT32 StatusLen; CONST UINT64 *RegProp; + CONST UINT32 *RangesProp; UINT64 UartBase; + UINT64 TpmBase; + EFI_STATUS Status; Base = (VOID*)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress); @@ -58,18 +70,16 @@ PlatformPeim ( ASSERT (UartHobData != NULL); *UartHobData = 0; - // - // Look for a UART node - // - for (Prev = 0;; Prev = Node) { - Node = fdt_next_node (Base, Prev, NULL); + for (Prev = Depth = 0;; Prev = Node) { + Node = fdt_next_node (Base, Prev, &Depth); if (Node < 0) { break; } - // - // Check for UART node - // + if (Depth == 1) { + Parent = Node; + } + Compatible = fdt_getprop (Base, Node, "compatible", &Len); // @@ -89,10 +99,62 @@ PlatformPeim ( UartBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); - DEBUG ((EFI_D_INFO, "%a: PL011 UART @ 0x%lx\n", __FUNCTION__, UartBase)); + DEBUG ((DEBUG_INFO, "%a: PL011 UART @ 0x%lx\n", __FUNCTION__, UartBase)); *UartHobData = UartBase; break; + } else if (FixedPcdGetBool (PcdTpm2SupportEnabled) && + AsciiStrCmp (CompItem, "tcg,tpm-tis-mmio") == 0) { + + RegProp = fdt_getprop (Base, Node, "reg", &Len); + ASSERT (Len == 8 || Len == 16); + if (Len == 8) { + TpmBase = fdt32_to_cpu (RegProp[0]); + } else if (Len == 16) { + TpmBase = fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RegProp)); + } + + if (Depth > 1) { + // + // QEMU/mach-virt may put the TPM on the platform bus, in which case + // we have to take its 'ranges' property into account to translate the + // MMIO address. This consists of a + // tuple, where the child base and the size use the same number of + // cells as the 'reg' property above, and the parent base uses 2 cells + // + RangesProp = fdt_getprop (Base, Parent, "ranges", &RangesLen); + ASSERT (RangesProp != NULL); + + // a plain 'ranges' attribute without a value implies a 1:1 mapping + if (RangesLen != 0) { + // assume a single translated range with 2 cells for the parent base + if (RangesLen != Len + 2 * sizeof (UINT32)) { + DEBUG ((DEBUG_WARN, + "%a: 'ranges' property has unexpected size %d\n", + __FUNCTION__, RangesLen)); + break; + } + + if (Len == 8) { + TpmBase -= fdt32_to_cpu (RangesProp[0]); + } else { + TpmBase -= fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RangesProp)); + } + + // advance RangesProp to the parent bus address + RangesProp = (UINT32 *)((UINT8 *)RangesProp + Len / 2); + TpmBase += fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RangesProp)); + } + } + + DEBUG ((DEBUG_INFO, "%a: TPM @ 0x%lx\n", __FUNCTION__, TpmBase)); + + Status = PcdSet64S (PcdTpmBaseAddress, TpmBase); + ASSERT_RETURN_ERROR (Status); + + Status = PeiServicesInstallPpi (&mTpm2DiscoveredPpi); + ASSERT_EFI_ERROR (Status); + break; } } } -- 2.20.1