From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web12.10421.1580985473585706738 for ; Thu, 06 Feb 2020 02:37:53 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: ashraf.javeed@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Feb 2020 02:37:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,409,1574150400"; d="scan'208";a="264557452" Received: from pidsbabios005.gar.corp.intel.com ([10.66.128.37]) by fmsmga002.fm.intel.com with ESMTP; 06 Feb 2020 02:37:50 -0800 From: "Javeed, Ashraf" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Ray Ni Subject: [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH] MdePkg/Protocols: Code correction - removal of reserved member Date: Thu, 6 Feb 2020 16:07:39 +0530 Message-Id: <20200206103739.18732-1-ashraf.javeed@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Signed-off-by: Ashraf Javeed Cc: Michael D Kinney Cc: Liming Gao Cc: Ray Ni --- MdePkg/Include/Protocol/PciExpressPlatform.h | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/MdePkg/Include/Protocol/PciExpressPlatform.h b/MdePkg/Include/Protocol/PciExpressPlatform.h index dc58268..bb2c8c8 100644 --- a/MdePkg/Include/Protocol/PciExpressPlatform.h +++ b/MdePkg/Include/Protocol/PciExpressPlatform.h @@ -360,14 +360,10 @@ struct _EFI_PCI_EXPRESS_L1PM_SUBSTATES { }; /// -/// Reserves for future use -/// -typedef UINT8 EFI_PCI_EXPRESS_RESERVES; - -/// -/// The EFI_PCI_EXPRESS_DEVICE_POLICY is altogether 128-byte size, with each -/// byte field representing one PCI standerd feature defined in the PCI Express Base -/// Specification 4.0, version 1.0. +/// The EFI_PCI_EXPRESS_DEVICE_POLICY size is fixed as per its definition corresponding +/// to its version, with each byte field represents one PCI Express feature and +/// its bitmask define the legal combinations to represent all the valid combinations +/// of its attributes, defined in the PCI Express Base Specification. /// typedef struct { EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE DeviceCtlMPS; @@ -384,7 +380,6 @@ typedef struct { EFI_PCI_EXPRESS_CTO_SUPPORT CTOsupport; EFI_PCI_EXPRESS_CPM LinkCtlCPM; EFI_PCI_EXPRESS_L1PM_SUBSTATES L1PMSubstates; - EFI_PCI_EXPRESS_RESERVES Reserves[114]; } EFI_PCI_EXPRESS_DEVICE_POLICY; /// -- 2.21.0.windows.1