From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com []) by mx.groups.io with SMTP id smtpd.web10.16855.1581306819865977960 for ; Sun, 09 Feb 2020 19:53:40 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: chasel.chiu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Feb 2020 19:53:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,423,1574150400"; d="scan'208";a="232981256" Received: from unknown (HELO cchiu4-MOBL1.gar.corp.intel.com) ([10.5.215.139]) by orsmga003.jf.intel.com with ESMTP; 09 Feb 2020 19:53:39 -0800 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Maurice Ma , Nate DeSimone , Star Zeng Subject: [PATCH 1/2] IntelFsp2Pkg/GenCfgOpt.py: Coverity scan flags issues. Date: Mon, 10 Feb 2020 11:53:28 +0800 Message-Id: <20200210035329.19432-2-chasel.chiu@intel.com> X-Mailer: git-send-email 2.13.3.windows.1 In-Reply-To: <20200210035329.19432-1-chasel.chiu@intel.com> References: <20200210035329.19432-1-chasel.chiu@intel.com> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1706 Issue was: invalid_operation: Invalid operation on null-like value "Base". Fixed it by initializing Base to 0 before entering while loop. Test: Compared script output before and after this patch and the result is identical. Cc: Maurice Ma Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/Tools/GenCfgOpt.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py index 2fa7582d85..d1d6901bc3 100644 --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py @@ -1,6 +1,6 @@ ## @ GenCfgOpt.py # -# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -439,6 +439,7 @@ EndList MaxAlign = 32 #Default align to 32, but if there are 64 bit unit, align to 64 SizeAlign = 0 #record the struct max align + Base = 0 #Starting offset of sub-structure. while len(DscLines): DscLine = DscLines.pop(0).strip() Handle = False -- 2.13.3.windows.1