From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by mx.groups.io with SMTP id smtpd.web12.114.1581539168762016132 for ; Wed, 12 Feb 2020 12:26:09 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=Erjz99RU; spf=pass (domain: nuviainc.com, ip: 209.85.128.67, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f67.google.com with SMTP id p17so4093344wma.1 for ; Wed, 12 Feb 2020 12:26:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=kRP2oqmlgmRReploMfBmNBJT368CaK446W2dgStVtc8=; b=Erjz99RUH7vhWnLhySsi3BdGHhDFsZJjwCBWNI+KCPL8qrClcRW7eWk7ICDKwiy3fc mE2nBcypqh6YVAfmjrp+Y8D7Ye4PXHxjHsQIhGyTiGNNJzjNig3eNMHZGK2wUqiP6GMr vA2uPjGH6xBRxKOvm3WV1HUCWLnbjQoTAjv8hSrEACvE/8FbWqX+cghqrMdxFJMP+Y3x urlyenp9+Cm0Y5jNn8XarDwrjAn0QKf0DaA+EZhtAWqccZcfvi5pDRrgUIXWRgYI7CHx clkg1j8kh22ZwspMLBmz+rX7wMBRjBP3hADaGWIXr3M8SNxrBmk1CUg2MI6EwQSAMcbN 6Vrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=kRP2oqmlgmRReploMfBmNBJT368CaK446W2dgStVtc8=; b=dpaqoxY48rsFY9vz51g9kaNrPTRGkJjKznESOsiEp6SyjC8kJIoAohiOyFOOwDsSbi ab4tt7pjZYLaSVtkfshiZOnFneGObRdLtPbwYRXKW/8cC9q7ISl+BYDRjcwqy9e8+IVn YIP8Na8MCQ42rrsPFY3k6mx6TEK7q2W/Yu1+PPJGr1WzlJl97sy5FC25fDcWAPRUHAR0 fAOwYC0DdUtO6yjvz9kagwpgdX/ooice2ve8o9upn6o+JCCeoFiqx0PQ44NzIPX50MQi dyNEk4UPWwDPEHRa44DShvW19eAT1zhqlIrhksZe+lUuyuHZEL8uLoGi+34/SCGHNQZn gJLg== X-Gm-Message-State: APjAAAVQeRIryOXaXcEQQV62mqhh4EUa05Dmqrx3xdZmF+nr6XNX946+ 7wBXBQ5n3eIo2ruVigc5biwF7OXeu4Q= X-Google-Smtp-Source: APXvYqz1VmdoTmiqozQ1ufRsZARzOVNnV0+6xKq4Wme8ffWjycsWRtYBc6j8H5Mpk9tzYsONElvrBQ== X-Received: by 2002:a1c:4e03:: with SMTP id g3mr876230wmh.22.1581539167158; Wed, 12 Feb 2020 12:26:07 -0800 (PST) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id g7sm2049607wrq.21.2020.02.12.12.26.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 12:26:06 -0800 (PST) Date: Wed, 12 Feb 2020 20:26:05 +0000 From: "Leif Lindholm" To: Pankaj Bansal Cc: Meenakshi Aggarwal , Michael D Kinney , Varun Sethi , devel@edk2.groups.io Subject: Re: [PATCH 16/19] Silicon/NXP: Add Pl011 Serial port lib Message-ID: <20200212202605.GE23627@bivouac.eciton.net> References: <20200207124328.8723-1-pankaj.bansal@nxp.com> <20200207124328.8723-17-pankaj.bansal@nxp.com> MIME-Version: 1.0 In-Reply-To: <20200207124328.8723-17-pankaj.bansal@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Feb 07, 2020 at 18:13:25 +0530, Pankaj Bansal wrote: > Use ArmPlatformPkg/PL011SerialPortLib with some changes: > 1. add Get clock API to get the UART clock from ArmPlatformLib > 2. remove SerialPortInitalize functionality > > This is same as being done in Silicon/NXP/Library/BaseSerialPortLib16550. And just like for that one, any functionality changes need to be introduced conditionally in the original - if there is no other way to achieve the same effect. / Leif > Signed-off-by: Pankaj Bansal > --- > .../PL011SerialPortLib/PL011SerialPortLib.c | 229 ++++++++++++++++++ > .../PL011SerialPortLib/PL011SerialPortLib.inf | 42 ++++ > Silicon/NXP/NxpQoriqLs.dsc.inc | 1 + > 3 files changed, 272 insertions(+) > create mode 100644 Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.c > create mode 100644 Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.inf > > diff --git a/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.c b/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.c > new file mode 100644 > index 0000000000..35cfe8e324 > --- /dev/null > +++ b/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.c > @@ -0,0 +1,229 @@ > +/** @file > + Serial I/O Port library functions with no library constructor/destructor > + > + Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
> + Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.
> + Copyright (c) 2015, Intel Corporation. All rights reserved.
> + Copyright 2020 NXP > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +extern NXP_PLATFORM_GET_CLOCK_PPI mPlatformGetClockPpi; > + > +/** Initialise the serial device hardware with default settings. > + > + @retval RETURN_SUCCESS The serial device was initialised. > + @retval RETURN_INVALID_PARAMETER One or more of the default settings > + has an unsupported value. > + **/ > +RETURN_STATUS > +EFIAPI > +SerialPortInitialize ( > + VOID > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + Write data to serial device. > + > + @param Buffer Point of data buffer which need to be written. > + @param NumberOfBytes Number of output bytes which are cached in Buffer. > + > + @retval 0 Write data failed. > + @retval !0 Actual number of bytes written to serial device. > + > +**/ > +UINTN > +EFIAPI > +SerialPortWrite ( > + IN UINT8 *Buffer, > + IN UINTN NumberOfBytes > + ) > +{ > + return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > +} > + > +/** > + Read data from serial device and save the data in buffer. > + > + @param Buffer Point of data buffer which need to be written. > + @param NumberOfBytes Number of output bytes which are cached in Buffer. > + > + @retval 0 Read data failed. > + @retval !0 Actual number of bytes read from serial device. > + > +**/ > +UINTN > +EFIAPI > +SerialPortRead ( > + OUT UINT8 *Buffer, > + IN UINTN NumberOfBytes > +) > +{ > + return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); > +} > + > +/** > + Check to see if any data is available to be read from the debug device. > + > + @retval TRUE At least one byte of data is available to be read > + @retval FALSE No data is available to be read > + > +**/ > +BOOLEAN > +EFIAPI > +SerialPortPoll ( > + VOID > + ) > +{ > + return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase)); > +} > +/** > + Set new attributes to PL011. > + > + @param BaudRate The baud rate of the serial device. If the > + baud rate is not supported, the speed will > + be reduced down to the nearest supported one > + and the variable's value will be updated > + accordingly. > + @param ReceiveFifoDepth The number of characters the device will > + buffer on input. If the specified value is > + not supported, the variable's value will > + be reduced down to the nearest supported one. > + @param Timeout If applicable, the number of microseconds the > + device will wait before timing out a Read or > + a Write operation. > + @param Parity If applicable, this is the EFI_PARITY_TYPE > + that is computed or checked as each character > + is transmitted or received. If the device > + does not support parity, the value is the > + default parity value. > + @param DataBits The number of data bits in each character > + @param StopBits If applicable, the EFI_STOP_BITS_TYPE number > + of stop bits per character. If the device > + does not support stop bits, the value is the > + default stop bit value. > + > + @retval EFI_SUCCESS All attributes were set correctly. > + @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported > + value. > + @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly. > + > +**/ > +RETURN_STATUS > +EFIAPI > +SerialPortSetAttributes ( > + IN OUT UINT64 *BaudRate, > + IN OUT UINT32 *ReceiveFifoDepth, > + IN OUT UINT32 *Timeout, > + IN OUT EFI_PARITY_TYPE *Parity, > + IN OUT UINT8 *DataBits, > + IN OUT EFI_STOP_BITS_TYPE *StopBits > + ) > +{ > + UINT64 SerialClock; > + > + SerialClock = mPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0); > + if (SerialClock == 0) { > + return EFI_DEVICE_ERROR; > + } > + > + return PL011UartInitializePort ( > + (UINTN)PcdGet64 (PcdSerialRegisterBase), > + SerialClock, > + BaudRate, > + ReceiveFifoDepth, > + Parity, > + DataBits, > + StopBits > + ); > +} > + > +/** > + > + Assert or deassert the control signals on a serial port. > + The following control signals are set according their bit settings : > + . Request to Send > + . Data Terminal Ready > + > + @param[in] Control The following bits are taken into account : > + . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the > + "Request To Send" control signal if this bit is > + equal to one/zero. > + . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert > + the "Data Terminal Ready" control signal if this > + bit is equal to one/zero. > + . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable > + the hardware loopback if this bit is equal to > + one/zero. > + . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported. > + . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/ > + disable the hardware flow control based on CTS (Clear > + To Send) and RTS (Ready To Send) control signals. > + > + @retval RETURN_SUCCESS The new control bits were set on the device. > + @retval RETURN_UNSUPPORTED The device does not support this operation. > + > +**/ > +RETURN_STATUS > +EFIAPI > +SerialPortSetControl ( > + IN UINT32 Control > + ) > +{ > + return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); > +} > + > +/** > + > + Retrieve the status of the control bits on a serial device. > + > + @param[out] Control Status of the control bits on a serial device : > + > + . EFI_SERIAL_DATA_CLEAR_TO_SEND, > + EFI_SERIAL_DATA_SET_READY, > + EFI_SERIAL_RING_INDICATE, > + EFI_SERIAL_CARRIER_DETECT, > + EFI_SERIAL_REQUEST_TO_SEND, > + EFI_SERIAL_DATA_TERMINAL_READY > + are all related to the DTE (Data Terminal Equipment) > + and DCE (Data Communication Equipment) modes of > + operation of the serial device. > + . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the > + receive buffer is empty, 0 otherwise. > + . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the > + transmit buffer is empty, 0 otherwise. > + . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if > + the hardware loopback is enabled (the output feeds > + the receive buffer), 0 otherwise. > + . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one > + if a loopback is accomplished by software, else 0. > + . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to > + one if the hardware flow control based on CTS (Clear > + To Send) and RTS (Ready To Send) control signals is > + enabled, 0 otherwise. > + > + @retval RETURN_SUCCESS The control bits were read from the device. > + > +**/ > +RETURN_STATUS > +EFIAPI > +SerialPortGetControl ( > + OUT UINT32 *Control > + ) > +{ > + return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); > +} > diff --git a/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.inf b/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.inf > new file mode 100644 > index 0000000000..29f234027f > --- /dev/null > +++ b/Silicon/NXP/Library/PL011SerialPortLib/PL011SerialPortLib.inf > @@ -0,0 +1,42 @@ > +#/** @file > +# > +# Component description file for PL011SerialPortLib module > +# > +# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.
> +# Copyright 2020 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010005 > + BASE_NAME = PL011SerialPortLib > + FILE_GUID = 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = SerialPortLib > + > +[Sources.common] > + PL011SerialPortLib.c > + > +[LibraryClasses] > + PL011UartLib > + PcdLib > + ArmPlatformLib > + > +[Packages] > + EmbeddedPkg/EmbeddedPkg.dec > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + Silicon/NXP/NxpQoriqLs.dec > + > +[Pcd] > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase > + > +[FixedPcd] > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits > diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc > index 9922686304..2ab6ee1920 100644 > --- a/Silicon/NXP/NxpQoriqLs.dsc.inc > +++ b/Silicon/NXP/NxpQoriqLs.dsc.inc > @@ -100,6 +100,7 @@ > IoAccessLib|Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > PlatformPeiLib|Silicon/NXP/Library/PlatformPeiLib/PlatformPeiLib.inf > MemoryInitPeiLib|Silicon/NXP/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf > + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > > [LibraryClasses.common.SEC] > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > -- > 2.17.1 >